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HCS512 数据表(PDF) 7 Page - Microchip Technology |
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HCS512 数据表(HTML) 7 Page - Microchip Technology |
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7 / 20 page ![]() HCS512 © 1997 Microchip Technology Inc. DS40151C-page 7 4.3 Validation Steps Validation consists of the following steps: • Search EEPROM to find the Serial Number Check Value Match • Decrypt the Hopping Code • Compare the 10 bits of discrimination value with the lower 10 bits of serial number • Check if the synchronization counter falls within the first synchronization window. • Check if the synchronization counter falls within the second synchronization window. • If a valid transmission is found, update the syn- chronization counter, else use the next transmitter block and repeat the tests. FIGURE 4-2: DECODER OPERATION 4.4 Synchronization with Decoder The KEELOQ technology features a sophisticated synchronization technique (Figure 4-3) which does not require the calculation and storage of future codes. If the stored counter value for that particular transmitter and the counter value that was just decrypted are within a formatted window of 16, the counter is stored and the command is executed. If the counter value was not within the single operation window, but is within the double operation window of 16K, the transmitted syn- chronization value is stored in a temporary location, and it goes back to waiting for another transmission. When the next valid transmission is received, it will check the new value with the one in temporary storage. If the two values are sequential, it is assumed that the counter was outside of the single operation ‘window’, but is now back in sync, so the new synchronization value is stored and the command executed. If a trans- mitter has somehow gotten out of the double operation window, the transmitter will not work and must be relearned. Since the entire window rotates after each valid transmission, codes that have been used become part of the ‘blocked’ (48K) codes and are no longer valid. This eliminates the possibility of grabbing a previ- ous code and retransmitting it to gain entry. FIGURE 4-3: SYNCHRONIZATION WINDOW 4.5 Sleep Mode The sleep mode of the HCS512 is used to reduce cur- rent consumption when no RF input signal is present. Sleep mode will only be effective in systems where the RF receiver is relatively quiet when no signal is present. During sleep, the clock stops, thereby significantly reducing the operating current. Sleep mode is enabled by the SLEEP bit in the configuration byte. The HCS512 will enter sleep mode when: • The RF line is low • After a function output is switched off • Learn mode is terminated (time-out reached) The device will not enter sleep mode when: • A function output is active • Learn sequence active • Device is in programming mode The device will wake up from sleep when: • The SLEEP input pin changes state • The CLOCK line changes state ? Transmission Received Does Ser # Check Val Match ? Decrypt Transmission Is Decryption Valid ? Is Counter Within 16 ? Is Counter Within 32K ? Update Counter Execute Command Save Counter in Temp Location Start No No No No Yes Yes Yes Yes Yes No and Note: During sleep mode the CLK line will change from an output line to an input line that can be used to wake up the device. Connect CLK to LRNIN via a 100K resistor to reliably enter the learn mode whenever sleep mode is active. Blocked Entire Window rotates to eliminate previously used codes Current Position (48K Codes) Double Operation (16K Single Operation Window (16 Codes) Codes) |
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