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PIC16F877-04/P 数据表(PDF) 102 Page - Microchip Technology |
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PIC16F877-04/P 数据表(HTML) 102 Page - Microchip Technology |
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102 / 218 page  PIC16F87X DS30292C-page 100 2001 Microchip Technology Inc. When setting up an Asynchronous Transmission, follow these steps: 1. Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is desired, set bit BRGH (Section 10.1). 2. Enable the asynchronous serial port by clearing bit SYNC and setting bit SPEN. 3. If interrupts are desired, then set enable bit TXIE. 4. If 9-bit transmission is desired, then set transmit bit TX9. 5. Enable the transmission by setting bit TXEN, which will also set bit TXIF. 6. If 9-bit transmission is selected, the ninth bit should be loaded in bit TX9D. 7. Load data to the TXREG register (starts trans- mission). 8. If using interrupts, ensure that GIE and PEIE (bits 7 and 6) of the INTCON register are set. FIGURE 10-2: ASYNCHRONOUS MASTER TRANSMISSION FIGURE 10-3: ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK) TABLE 10-5: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other RESETS 0Bh, 8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF R0IF 0000 000x 0000 000u 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 18h RCSTA SPEN RX9 SREN CREN — FERR OERR RX9D 0000 -00x 0000 -00x 19h TXREG USART Transmit Register 0000 0000 0000 0000 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 98h TXSTA CSRC TX9 TXEN SYNC — BRGH TRMT TX9D 0000 -010 0000 -010 99h SPBRG Baud Rate Generator Register 0000 0000 0000 0000 Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for asynchronous transmission. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F873/876; always maintain these bits clear. Word 1 STOP Bit Word 1 Transmit Shift Reg START Bit Bit 0 Bit 1 Bit 7/8 Write to TXREG Word 1 BRG Output (Shift Clock) RC6/TX/CK (pin) TXIF bit (Transmit Buffer Reg. Empty Flag) TRMT bit (Transmit Shift Reg. Empty Flag) Transmit Shift Reg. Write to TXREG BRG Output (Shift Clock) RC6/TX/CK (pin) TXIF bit (Interrupt Reg. Flag) TRMT bit (Transmit Shift Reg. Empty Flag) Word 1 Word 2 Word 1 Word 2 START Bit STOP Bit START Bit Transmit Shift Reg. Word 1 Word 2 Bit 0 Bit 1 Bit 7/8 Bit 0 Note: This timing diagram shows two consecutive transmissions. |
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