MITSUBISHI MICROCOMPUTERS

M35072-XXXFP

SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

8

Set external clock frequency division value of horizontal oscillation

frequency.

N1 =

N1 : division value

DA

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Set display frequency range.

Display clock setting

See REGISTER SUPPLYMENTARY

DESCRIPTION (1)

Alleviates continuous vertical jitters.

EXCK1

0

0

1

1

EXCK0

0

1

0

1

DIV0

DIV1

DIV2

DIV3

DIV4

DIV5

DIV6

DIV7

DIV8

DIV9

DIV10

DIVS0

DIVS1

VJT

10

Σ

n = 0

0

1

2

3

4

5

6

7

8

9

A

B

C

D

E

0

1

REGISTERS DESCRIPTION

Register

Status

Contents

Function

Remarks

(DIVn

____

Notes 1. The mark

around the status value means the reset status by the "L" level is input to AC pin.

2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1",

data is written into page 1.

3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".

Display clock input

External synchronous (external clock)

Do not set

Do not set

External synchronous (internal clock)

It is used to "0", normally.

For setting, see REGISTER SUPPLYMENTARY DESCRIPTION

(2).

Set display frequency by division value

setting.

For details, see REGISTER

SUPPLYMENTARY DESCRIPTION

(1).

Also, set the display frequency range by

registers DIVS0, DIVS1(address

with the display frequency.

Any of this settings above is required

only when EXCK1 = 1, EXCK0 = 1.

EXCK0

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)

(Note 3)