TC647

DS21447C-page 14

 2002 Microchip Technology Inc.

FIGURE 5-7:

Output Drive Transistor Circuit Topologies.

FIGURE 5-8:

Powering the Fan from a

-12V Supply.

5.6

Latch-Up Considerations

As with any CMOS IC, the potential exists for latch-up

if signals are applied to the device which are outside

the power supply range. This is of particular concern

during power-up if the external circuitry (such as the

powered by a supply different from that of the TC647.

supply powers up first. If possible, the networks

supply at the same physical location as the IC itself.

Even if the IC and any external networks are powered

by the same supply, physical separation of the connect-

ing points can result in enough parasitic capacitance

and/or inductance in the power supply connections to

delay one power supply “routing” versus another.

5.7

Power Supply Routing and

Bypassing

erroneous operation of the FAULT output. As a result,

these inputs should be bypassed with a 0.01 µF capac-

itor mounted as close to the package as possible. This

high impedance source (such as a thermistor). In addi-

capacitor. Ground should be kept as short as possible.

To keep fan noise off the TC647 ground pin, individual

ground returns for the TC647 and the low side of the

fan current sense resistor should be used.

Design Example

having a resistance of 10 k

and 4.65 k

Limit the divider current to 100 µA from which

Step 3. Design the output circuit.

Maximum fan motor current = 250 mA.

Q1

Q1

Q2

GND

Fan

a) Single Bipolar Transistor

Q1

GND

C) N-Channel MOSFET

GND

Fan

b) Darlington Transistor Pair

Fan

GND

+5V

Q1 *

TC647

Fan

R2 *

2.2 k

Ω

R3 *

2.2

Ω

*Note: Value depends on the specific application and is shown for example only.

D1

12.0V

Zener

-12V

R4 *

10 k

Ω