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PIC16LC774-04/SS 数据表(PDF) 35 Page - Microchip Technology |
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PIC16LC774-04/SS 数据表(HTML) 35 Page - Microchip Technology |
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35 / 200 page ![]() PIC16C77X © 1999 Microchip Technology Inc. Advance Information DS30275A-page 35 3.5 PORTE and TRISE Register This section is applicable to the 40/44-pin devices only. PORTE has three pins RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7, which are individually configurable as inputs or outputs. These pins have Schmitt Trigger input buffers. I/O PORTE becomes control inputs for the micropro- cessor port when bit PSPMODE (TRISE<4>) is set. In this mode, the user must make sure that the TRISE<2:0> bits are set (pins are configured as digital inputs). Ensure ADCON1 is configured for digital I/O. In this mode the input buffers are TTL. Figure 3-12 shows the TRISE register, which also con- trols the parallel slave port operation. PORTE pins are multiplexed with analog inputs. When selected as an analog input, these pins will read as ’0’s. TRISE controls the direction of the RE pins, even when they are being used as analog inputs. The user must make sure to keep the pins configured as inputs when using them as analog inputs. FIGURE 3-11: PORTE BLOCK DIAGRAM (IN I/O PORT MODE) FIGURE 3-12: TRISE REGISTER (ADDRESS 89h) Note: On a Power-on Reset these pins are con- figured as analog inputs. Data bus WR PORT WR TRIS RD PORT Data Latch TRIS Latch RD TRIS Schmitt Trigger input buffer Q D CK Q D CK EN QD EN I/O pin(1) Note 1: I/O pins have protection diodes to VDD and VSS. R-0 R-0 R/W-0 R/W-0 U-0 R/W-1 R/W-1 R/W-1 IBF OBF IBOV PSPMODE — bit2 bit1 bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR reset bit7 bit0 bit 7 : IBF: Input Buffer Full Status bit 1 = A word has been received and is waiting to be read by the CPU 0 = No word has been received bit 6: OBF: Output Buffer Full Status bit 1 = The output buffer still holds a previously written word 0 = The output buffer has been read bit 5: IBOV: Input Buffer Overflow Detect bit (in microprocessor mode) 1 = A write occurred when a previously input word has not been read (must be cleared in software) 0 = No overflow occurred bit 4: PSPMODE: Parallel Slave Port Mode Select bit 1 = Parallel slave port mode 0 = General purpose I/O mode bit 3: Unimplemented: Read as '0' PORTE Data Direction Bits bit 2: Bit2: Direction Control bit for pin RE2/CS/AN7 1 = Input 0 = Output bit 1: Bit1: Direction Control bit for pin RE1/WR/AN6 1 = Input 0 = Output bit 0: Bit0: Direction Control bit for pin RE0/RD/AN5 1 = Input 0 = Output |
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