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PIC16LC774-04/SS 数据表(PDF) 21 Page - Microchip Technology |
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PIC16LC774-04/SS 数据表(HTML) 21 Page - Microchip Technology |
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21 / 200 page  PIC16C77X © 1999 Microchip Technology Inc. Advance Information DS30275A-page 21 2.2.2.6 PIE2 REGISTER This register contains the individual enable bits for the CCP2, SSP bus collision, and low voltage detect inter- rupts. FIGURE 2-8: PIE2 REGISTER (ADDRESS 8Dh) R/W-0 U-0 U-0 U-0 R/W-0 U-0 U-0 R/W-0 LVDIE — — —BCLIE — — CCP2IE R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR reset bit7 bit0 bit 7 LVDIE: Low-voltage Detect Interrupt Enable bit 1 = LVD Interrupt is enabled 0 = LVD Interrupt is disabled bit 6-4: Unimplemented: Read as ’0’ bit 3: BCLIE: Bus Collision Interrupt Enable bit 1 = Bus Collision interrupt is enabled 0 = Bus Collision interrupt is disabled bit 2-1: Unimplemented: Read as ’0’ bit 0: CCP2IE: CCP2 Interrupt Enable bit 1 = Enables the CCP2 interrupt 0 = Disables the CCP2 interrupt |
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