ML2280, ML2283

9

Figure 6. ML2288 Functional Block Diagram

C

Q

R

D

R

D

C

Q

D

C

Q

R

D

C

Q

R

+

–

–

+

ANALOG

MUX

(EQUIVALENT)

Σ

3

CH0*

16

CLK

13

DI*

2

CS

CH3*

V+*

DGND*

AGND*

CH1

4

CH2*

5

6

8

1

9

14

TO INTERNAL

CIRCUITRY

7V SHUNT

REGULATOR

INPUT PROTECTION—ALL LOGIC INPUTS

C

C

R

LADDER

AND

DECODER

SAR

LOGIC

AND

LATCH

9-BIT

SHIFT

REGISTER

COMP

B7

B6

B5

B4

10

DO

B2

B3

B1

B0

CS

CS

CS

COMP

PARALLEL XFR

TO SHIFT REGISTER

MSB FIRST

LSB FIRST

EOC

EOC

R

R

C

CS

DEOC

CS

CS

CS

CS

TO

INTERNAL

CIRCUITS

INPUT

13

16

17

18

MUX

ADDRESS

SARS*

11

SELECT 0

SELECT 1

START

RR

RR

R

D

C

SGL/DIF

5-BIT SHIFT-REGISTER

ODD/

SIGN

TIME

DELAY

DSTART 2

START

DSTART 1

* SOME OF THESE FUNCTIONS/PINS ARE NOT AVAILABLE WITH ML2280.