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ML4841CS 数据表(PDF) 10 Page - Micro Linear Corporation |
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ML4841CS 数据表(HTML) 10 Page - Micro Linear Corporation |
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10 / 15 page ![]() ML4841 10 FUNCTIONAL DESCRIPTION (Continued) Figure 3. External Component Connections to VCC At VCC = 13.5V and assuming Ramp Peak = 5V to allow for component tolerances: tR C CHARGE T T =× × 0 463 . (9) The capacitor value should remain small to keep the discharge energy and the resulting discharge current through the part small. A good value to use is the same value used in the PWM timing circuit (CT). For the application circuit shown in the data sheet, using a 200kHz PWM and 390pF timing cap yields RT: Rk T = × × = − − 110 0 463 390 10 56 2 5 12 ( . )( ) . Ω (10) PWM SECTION Pulse Width Modulator The PWM section of the ML4841 is straightforward, but there are several points which should be noted. Foremost among these is its inherent synchronization to the PFC section of the device, to which it also provides its basic timing. The PWM operates in current-mode. In applications utilizing current mode control, the PWM ramp (RAMP 2) is usually derived directly from a current sensing resistor or current transformer in the primary of the output stage, and is thereby representative of the current flowing in the converter’s output stage. The DC ILIMIT comparator provides cycle-by-cycle current limiting and is connected to RAMP 2 internally. If the current sense signal exceeds the 1V threshold, the PWM switch is disabled until the protection flip-flop is rest by the clock pulse at the start of the next PWM power cycle. PWM Current Limit The DC ILIMIT comparator is a cycle-by-cycle current limiter for the PWM section. Should the input voltage at this pin ever exceed 1V, the output of the PWM will be disabled until the output flip-flop is reset by the clock pulse at the start of the next PWM power cycle. VIN OK Comparator The VIN OK comparator monitors the DC output of the PFC and inhibits the PWM if this voltage on VFB is less than its nominal 2.5V. Once this voltage reaches 2.5V, which corresponds to the PFC output capacitor being charged to its rated boost voltage, the soft-start commences. PWM Control (RAMP 2) The PWM section utilizes current mode control. RAMP 2 is generally used as the sampling point for a voltage representing the current in the primary of the PWM’s output transformer, derived either by a current sensing resistor or a current transformer. Soft Start Start-up of the PWM is controlled by the selection of the external capacitor at SS. A current source of 50 µA supplies the charging current for the capacitor, and start-up of the PWM begins at 1.25V. Start-up delay can be programmed by the following equation: Ct A V SS DELAY =× 50 125 µ . (11) where CSS is the required soft start capacitance, and tDELAY is the desired start-up delay. It is important that the time constant of the PWM soft-start allows the PFC time to generate sufficient output power for the PWM section. The PWM start-up delay should be at least 5ms. Solving for the minimum value of CSS: Cms A V nF SS =× = 5 50 125 200 µ . ML4841 VCC GND VBIAS 10nF ceramic 1µF ceramic |
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