CHPHT

www.vishay.com

Vishay Sfernice

Revision: 21-Jul-14

1

Document Number: 52032

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

High Temperature (245 °C) Thick Film Chip Resistor

For applications such as down hole applications or aircraft

breaking systems, the need for parts able to withstand very

severe conditions (temperature as high as 230 °C powered

or up to 245 °C un-powered) has leaded Vishay Sfernice to

push out the limit of the thick film technology. Designers

might read the application note “Power Dissipation

Considerations in High Precision Vishay Sfernice Thin Film

Chips Resistors and Arrays (P, PRA etc.) (High Temperature

with this data sheet to help them to properly design their

PCBs and get the best performances of the CHPHT.



Vishay Sfernice R&D engineers will be willing to support any

customer design considerations.

FEATURES

• High temperature (245 °C)

• Large ohmic value range 0.1

 to 100 M

• Operating temperature range



(-55 °C to +230 °C)

• SMD wraparound chip resistor

• Storage temperature range



(-55 °C to +245 °C)

• Gold terminations for HMP process (< 1 μm thick) for

temperature up to 245 °C

• Tin/silver terminations for operating temperature up to

200 °C

• Material categorization: for definitions of compliance

Available

DIMENSIONS in millimeters

CASE SIZE

AB

C

D

E

± 0.152

± 0.127

± 0.127

± 0.127

± 0.127

0603

1.60

0.90

0.38

0.31

0.40

0805

1.85

1.25

0.38

0.31

0.50

1206

3.00

1.73

0.38

0.40

0.50

2010

5.03

2.64

0.50

0.50

0.50

A

B

C

E

D

SUGGESTED LAND PATTERN (to IPC-7351A)

CASE SIZE

0603

2.15

0.39

1.03

0805

2.70

0.44

1.38

1206

3.85

1.59

1.85

2010

5.88

3.62

2.77

G

min.

Z

max.

X

max.