SM5844AF

NIPPON PRECISION CIRCUITS—25

APPLICATION NOTE

Delay in the slave mode

In the slave mode , the delay (tbdH2, tbdL2)of

DUOT from BCKO is MIN= 10ns, MAX= 100ns

which is ratter wide width.

As specified in AC Electrical Characteristics, and

BCKO is prohibited from inputting longer than

64fso.

When tbdH2, tbdL2 is maximum 100ns, ideal timing

may not be attained for the following devise,

depending on the OCLK cycle (example 1).

Please use considering the timing in the following

examples in the slave mode.

(example 1) OCLK= 39ns(fs= 99.84kHz), OCKSL= L(256fs), BCKO(64fso)= 156ns, OW20N= L, OW18N= H

(example 2) OCLK= 59ns(fs= 44.1kHz), OCKSL= H(384fs), BCKO(64fso)= 354ns, OW20N= L, OW18N= H

LRCO

DOUT

BCKO

(LSB)

100ns

100ns

156ns

L2

L1

LRCO

DOUT

BCKO

L2

L1

(LSB)

100ns

354ns

100ns