LIS3DETR datasheet(39/46 Pages) STMICROELECTRONICS

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LIS3DE

8.26

IG2_SOURCE (35h)

Interrupt 2 source register. Read-only register.

Reading at this address clears the IG2_SOURCE IA bit (and the interrupt signal on the INT2

pin) and allows data in the IG2_SOURCE register to be refreshed if the latched option was

chosen.

8.27

IG2_THS (36h)

8.28

IG2_DURATION (37h)

The D [6:0] bits set the minimum duration of the Interrupt 2 event to be recognized. Duration

time steps and maximum values depend on the ODR chosen.

Table 60. IG2_SOURCE register

YHYL

XHXL

Table 61. IG2_SOURCE register description

Interrupt active. Default value: 0

(0: no interrupt has been generated; 1: one or more interrupts have been generated)

Z high. Default value: 0

(0: no interrupt, 1: Z high event has occurred)

Z low. Default value: 0

(0: no interrupt; 1: Z low event has occurred)

Y high. Default value: 0

(0: no interrupt, 1: Y high event has occurred)

Y low. Default value: 0

(0: no interrupt, 1: Y low event has occurred)

X high. Default value: 0

(0: no interrupt, 1: X high event has occurred)

X low. Default value: 0

(0: no interrupt, 1: X low event has occurred)

Table 62. IG2_THS register

THS6

THS5

THS4

THS3

THS2

THS1

THS0

Table 63. IG2_THS register description

THS[6:0]

Interrupt 1 threshold. Default value: 000 0000

Table 64. IG2_DURATION register

D6D5D4D3D2D1D0

Table 65. IG2_DURATION register description

D [6:0]

Duration value. Default value: 000 0000

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