| 数据搜索系统,热门电子元器件搜索 |
|
REF3333AIDBZR 数据表(PDF) 13 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
REF3333AIDBZR 数据表(HTML) 13 Page - Texas Instruments |
|
13 / 32 page ![]() || 3 2 3 REF DIFF REF IN 2 3 1 R R R V V A1+ A1 V V R R R 2 § · § · ¨ ¸ ¨ ¸ © ¹ © ¹ 2 2 2 2 2 5 2 2 2 R R R R R R R 2 R 2 § · ¨ ¸ © ¹ 3 REF REF 2 3 R V A1 V 2 R R § · ¨ ¸ © ¹ 7 REF REF 6 7 R V A1 V R R 2 § · ¨ ¸ © ¹ || 3 2 3 REF IN 2 3 1 R R R A1 V V R R R § · § · ¨ ¸ ¨ ¸ © ¹ © ¹ REF3312, REF3318, REF3320, REF3325, REF3330, REF3333 www.ti.com SBOS392E – AUGUST 2007 – REVISED OCTOBER 2014 Typical Applications (continued) 10.2.1.1 Design Requirements The design requirements are as follows: • Supply voltage: 3.3 V • Maximum input voltage: ±6 V • Specified input voltage: ±5 V • ADC reference voltage: 1.25 V 10.2.1.2 Detailed Design Procedure Figure 19 depicts a simplified schematic for this design showing the MSP430 ADC inputs and full input conditioning circuitry. The ADC is configured for a bipolar measurement where final conversion result is the differential voltage, VDIFF, between the positive and negative ADC inputs, A1+ and A1–. The bipolar, ground- referenced input signal must be level-shifted and attenuated by the op amp so that the output is biased to VREF / 2 and has a differential voltage that is within the ±VREF / 2 input range of the ADC. The transfer function for the op-amp circuit simplifies to Equation 4. where • R1 = R4 • R5 = R2 || R3 (4) The voltage applied to the negative ADC input, A1–, is based on the resistor divider formed by R6 and R7 and is set to VREF / 2 by setting R6 equal to R7, as shown in Equation 5. (5) 10.2.1.2.1 Op Amp Level-Shift Design The ratio of R2, R3, and the VREF voltage determines the voltage on the output of the op amp when the differential input is 0 V. Select the components so that VOUT is equal to the VREF / 2 voltage when VIN is equal to 0 V, as shown in Equation 6. where • VIN = 0 V • R2 = R3 (6) Solve for the value of R5 by setting R3 equal to R2 in Equation 4, as shown in Equation 7: (7) 10.2.1.2.2 Differential Input Attenuator Design VDIFF is the difference between the two inputs, as shown in Equation 8: (8) Copyright © 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: REF3312 REF3318 REF3320 REF3325 REF3330 REF3333 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |