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EM3591-RTR 数据表(PDF) 41 Page - Silicon Laboratories |
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EM3591-RTR 数据表(HTML) 41 Page - Silicon Laboratories |
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41 / 59 page ![]() EM359x Rev 1.0 41 23 PB3 I/O Digital I/O TIM2C3 (see also Pin 26) O Timer 2 channel 3 output Enable remap with TIM2_OR[6] Enable timer output in TIM2_CCER Select alternate output function with GPIO_PBCFGL[15:12] TIM2C3 (see also Pin 26) I Timer 2 channel 3 input Enable remap with TIM2_OR[6] SC1nCTS I UART CTS handshake of Serial Controller 1 Enable with SC1_UARTCFG[5] Select UART with SC1_MODE SC1SCLK O SPI master clock of Serial Controller 1 Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[6] Enable master with SC1_SPICFG[4] Select SPI with SC1_MODE Select alternate output function with GPIO_PBCFGL[15:12] SC1SCLK I SPI slave clock of Serial Controller 1 Enable slave with SC1_SPICFG[4] Select SPI with SC1_MODE 24 PB4 I/O Digital I/O TIM2C4 (see also Pin 28) O Timer 2 channel 4 output Enable remap with TIM2_OR[7] Enable timer output in TIM2_CCER Select alternate output function with GPIO_PBCFGH[3:0] TIM2C4 (see also Pin 28) I Timer 2 channel 4 input Enable remap with TIM2_OR[7] SC1nRTS O UART RTS handshake of Serial Controller 1 Either disable timer output in TIM2_CCER, or disable remap with TIM2_OR[7] Enable with SC1_UARTCFG[5] Select UART with SC1_MODE Select alternate output function with GPIO_PBCFGH[3:0] SC1nSSEL I SPI slave select of Serial Controller 1 Enable slave with SC1_SPICFG[4] Select SPI with SC1_MODE Table 6.1. EM359x Pin Descriptions (Continued) Pin # Signal Direction Description Note: 1. IRQC and IRQD external interrupts can be mapped to any digital I/O pin using the GPIO_IRQCSEL and GPIO_IRQDSEL registers. |
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