Data Sheet

ADL5903

Rev. B | Page 7 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RFIN

Signal Input. This pin is internally ac-coupled with a broadband matching network. See the RF Input Interface

section for broadband matching options.

2

GND

Device Ground. Connect GND to system ground using a low impedance path.

3

CRMS

RMS Averaging Pin. Connect a capacitor between the CREG and CRMS pins for rms averaging. See the

4

CREG

Bypass Capacitor Connection for On-Chip Regulator. Bypass this pin to ground using a capacitor and a series

resistor. See Basic Connections section for more information.

5

VPOS

Supply Voltage. The operational range is 3.0 V to 5.25 V.

6

ENBL

Enable. Connect the ENBL pin to a logic high (2 V to VPOS) to enable the device. Connect the ENBL pin to a

logic low (0 V to 0.6 V) to disable the device.

7

VRMS

Signal Output. The output from the VRMS pin is proportional to the logarithm of the rms value at the input

level.

8

NIC

No Internal Connection. Do not connect to this pin. This pin is not internally connected.

0

EP

Exposed Pad. The exposed pad is internally connected to GND and requires a good thermal and electrical

connection to the ground of the printed circuit board (PCB).

3

CRMS

4

CREG

1

RFIN

2

GND

6 ENBL

5 VPOS

8NIC

7VRMS

ADL5903

TOP VIEW

(Not to Scale)

NOTES

1. NIC = NO INTERNAL CONNECTION.

AND REQUIRES A GOOD THERMAL AND ELECTRICAL

CONNECTION TO THE GROUND OF THE PRINTED

CIRCUIT BOARD (PCB).