Data Sheet

ADL5903

Rev. B | Page 15 of 20

THEORY OF OPERATION

The ADL5903 is a true rms detector with a 35 dB measurement

range at 2.14 GHz with useable range up to 6 GHz. It features

no error ripple over its range, low temperature drift, and very

low power consumption. Temperature stability of the rms

output measurements provides ≤±0.5 dB error typical over the

temperature range of −40°C to +85°C up to 3.5 GHz. The

measurement output voltage scales linearly in decibels with a

slope of approximately 36 mV/dB.

The ADL5903 operates from a nominal supply voltage of 3.0 V

to 5.0 V. The rms core is internally regulated to 3.6 V, that is, the

full measurement range is available for supply voltages between

3.8 V and 5.0 V. Below 3.8 V, the high end of the measurement

range degrades gradually whereas the low end shows no noticeable

change in error characteristics or calibration requirements. At

2.14 GHz, the measurement range extends to 14 dBm for 3.8 V

and above, and to 12 dBm at a supply voltage of 3.0 V. The low

end of the ADL5903 measurement range is limited by internal

device offsets that vary from device to device but tracks well

over temperature. See the Device Calibration and Error

Calculation section for more information.

The core rms processing of the ADL5903 uses a proprietary

technique that provides accuracy for complex modulation

signals irrespective of the crest factor of the input signal. An

integrating filter capacitor at Pin CRMS performs the square

domain averaging.

An RF input matching network allows the device to be driven

with a 50 Ω source with reasonable input return loss. The

measurement intercept varies with frequency, as shown in

Table 1 and the Typical Performance Characteristics section.

Figure 39. Simplified Architecture

RF INPUT INTERFACE

A single-ended input at the RFIN pin drives the ADL5903, and

a 50 Ω source can drive it directly without any external

components. Figure 40 shows the simplified RF input interface.

An on-chip matching network presents 133 Ω of shunt

resistance to ground and ac coupling to the rms core. The ESD

protection circuitry is designed to allow voltage swings as high

as ±2 V at the input.

excellent input return loss over most of the operating range but

rises to around −9 dB near its minimum operating frequency of

200 MHz. Add an external shunt resistance of 127 Ω, if desired,

when operating at low frequencies to improve input return loss

over the range of 200 MHz to 1.7 GHz. Figure 41 shows a

comparison of the input return loss, with and without the

external shunt resistor.

Figure 40. Simplified RF Input Interface

Figure 41. Return Loss with and Without External Shunt Termination

BASIC CONNECTIONS

The ADL5903 requires a single supply of 3.0 V to 5.0 V. The

supply is connected to the VPOS supply pin. This pin is

decoupled using two capacitors with values equal or similar

to those shown in Figure 44. Place these capacitors as near the

VPOS pin as possible.

The CREG pin provides a bypass capacitor connection for an

on-chip regulator. The CREG pin is connected to ground with a

4.02 Ω resistor and a 0.1 μF capacitor. The CRMS pin provides

an averaging function for the rms computation and is

referenced to Pin 4 (CREG). A filter capacitor can be placed

between the CRMS and CREG pins. More information on

required for correct rms computation as the peak to average

ratio of modulated signals increases and the bandwidth of the

modulated signals decreases.

5

1

6

ADL5903

RFIN

ENBL

RMS CORE

INTERNAL

FILTERING

BUFFER

630pF

1kΩ

100Ω

4pF

VPOS

2

GND

8

NIC

EP

4

CREG

3

CRMS

7

VRMS

VPOS

MATCHING

NETWORK

GND

133Ω

4pF

OPTIONAL

127Ω

–25

–20

–15

–10

–5

0

012

345

6

FREQUENCY (GHz)

EXTERNAL 127Ω SHUNT TERM

NO SHUNT TERM