Data Sheet

ADP5300

Rev. 0 | Page 15 of 21

UNDERVOLTAGE LOCKOUT (UVLO)

The undervoltage lockout circuitry monitors the input voltage

level on the PVIN pin. If the input voltage falls below 2.00 V

(typical), the regulator turns off. After the input voltage rises

above 2.06 V (typical), the soft start period initiates, and when

the EN pin is high, the regulator enables.

ENABLE/DISABLE

The ADP5300 includes a separate enable (EN) pin. A logic high

on the EN pin starts the regulator. Due to the low quiescent current

design, it is typical for the regulator to start switching after a

delay of a few milliseconds from the EN pin being pulled high.

A logic low on the EN pin immediately disables the regulator

and brings the regulator into extremely low current consumption.

CURRENT LIMIT

The buck regulators in the ADP5300 have protection circuitry

that limits the direction and the amount of current to a certain

level that flows through the high-side MOSFET and the low-

side MOSFET in cycle-by-cycle mode. The positive current

limit on the high-side MOSFET limits the amount of current

that can flow from the input to the output. The negative current

limit on the low-side MOSFET prevents the inductor current

from reversing direction and flowing out of the load.

SHORT-CIRCUIT PROTECTION

The buck regulators in the ADP5300 include frequency foldback to

prevent current runaway on a hard short. When the output voltage

at the feedback (FB) pin falls below 0.3 V typical, indicating the

possibility of a hard short at the output, the switching frequency

(in PWM mode) is reduced to one-fourth of the internal

oscillator frequency. The reduction in the switching frequency

allows more time for the inductor to discharge, preventing a

runaway of output current.

SOFT START

The ADP5300 has an internal soft start function that ramps up

the output voltage in a controlled manner upon startup, thereby

limiting the inrush current. This feature prevents possible input

voltage drops when a battery or a high impedance power source

is connected to the input of the device. The default typical soft

start time is 350 µs for the regulator.

A different soft start time (2800 µs) can be programmed for

ADP5300 by the factory fuse.

STARTUP WITH PRECHARGED OUTPUT

The buck regulators in the ADP5300 include a precharged start-up

feature to protect the low-side MOSFET from damage during

startup. If the output voltage is precharged before the regulator

turns on, the regulator prevents reverse inductor current, which

discharges the output capacitor, until the internal soft start

reference voltage exceeds the precharged voltage on the FB pin.

100% DUTY OPERATION

When the input voltage approaches the output voltage, the

ADP5300 stops switching and enters 100% duty cycle operation. It

connects the output via the inductor and the internal high-side

power switch to the input. When the input voltage is charged

again and the required duty cycle falls to 95% typical, the buck

immediately restarts switching and regulation without allowing

overshoot on the output voltage. In hysteresis mode, the ADP5300

draws an ultralow quiescent current of only 570 nA typical

during 100% duty cycle operation.

ACTIVE DISCHARGE

The regulator in the ADP5300 integrates an optional, factory

programmable discharge switch from the switching node to

ground. This switch turns on when its associated regulator is

disabled, which helps discharge the output capacitor quickly.

The typical value of the discharge switch is 290 Ω for the

regulator.

By default, the discharge function is not enabled. The factory

fuse can enable the active discharge function.

VOUTOK FUNCTION

The ADP5300 includes an open-drain, power-good output

(VOUTOK pin) that is active high when the buck regulator

operates normally. By default, the VOUTOK pin monitors the

output voltage. A logic high on the VOUTOK pin indicates that

the regulated output voltage of the buck regulator is above 90%

(typical) of its nominal output. When the regulated output voltage

of the buck regulator falls below 87% (typical) of its nominal

output for a delay time greater than approximately 10 µs, the

VOUTOK pin goes low.