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USB3813 数据表(PDF) 14 Page - Microchip Technology |
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USB3813 数据表(HTML) 14 Page - Microchip Technology |
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14 / 57 page ![]() USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications Datasheet DS00001715A-page 14 2014 Microchip Technology Inc. 1 Suspend Output SUSPEND PU This signal is used to indicate that the entire hub has entered the USB suspend state and that VBUS current consumption should be reduced in accordance with the USB specification. Refer to Section 8.7, "Suspend (SUSPEND)," on page 42 for additional information. Note: SUSPEND must be enabled via the Protouch configuration tool. Interrupt Request Input IRQ_N IS This active-low signal allows external hardware to interrupt the device. Refer to Section 8.8, "Interrupt Requests (IRQ_N)," on page 43 for additional information. Interrupt Output INT_N OD8 This active-low signal allows the device to output an interrupt to external hardware. Refer to Section 8.9, "Interrupt Output (INT_N)," on page 43 for additional information. 1 USB Port Control PRTCTLA OD8/IS (PU) This pin functions as both the downstream USB port power enable output (PRTPWRA) and the downstream USB port over-current sense input (OCSA_N). POWER 1 Battery Power Supply Input VBAT P Battery power supply input. When VBAT is connected directly to a +3.3V supply from the system, the internal +3.3V regulator runs in dropout and regulator power consumption is eliminated. A 4.7 μF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4, "Power Connections," on page 17 for power connection information. 1 +3.3V Power Supply VDD33 P +3.3V power supply. A 1.0 μF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4, "Power Connections," on page 17 for power connection information. 1 +1.8-3.3V Core Power Supply Input VDDCOREREG P +1.8-3.3V core power supply input to internal +1.2V regulator. This pin may be connected to VDD33 for single supply applications when VBAT equals +3.3V. Running in a dual supply configuration with VDDCOREREG at a lower voltage, such as +1.8V, may reduce overall system power consumption. Refer to Chapter 4, "Power Connections," on page 17 for power connection information. 1 +1.2V Core Power Supply VDDCR12 P +1.2V core power supply. A 1.0 μF (<1 Ω ESR) capacitor to ground is required for regulator stability. The capacitor should be placed as close as possible to the device. Refer to Chapter 4, "Power Connections," on page 17 for power connection information. Table 3.1 Ball Descriptions (continued) NUM BALLS NAME SYMBOL BUFFER TYPE DESCRIPTION |
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