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LAN9500AI 数据表(PDF) 77 Page - Microchip Technology

部件名 LAN9500AI
功能描述  LAN950x USB 2.0 to 10/100 Ethernet Controller
PDF  213 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9500AI 数据表(HTML) 77 Page - Microchip Technology

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 2010 - 2015 Microchip Technology Inc.
DS00001875A-page 77
LAN950x
The Auto-MDIX function can be disabled through the Special Control/Status Indications Register, or the external
AUTOMDIX_EN configuration strap.
5.6.8
PHY POWER-DOWN MODES
There are 2 power-down modes for the PHY as discussed in the following sections.
5.6.8.1
General Power-Down
This power-down is controlled by register 0, bit 11. In this mode the PHY, except the management interface, is powered-
down and stays in that condition as long as PHY register bit 0.11 is HIGH. When bit 0.11 is cleared, the PHY powers up
and is automatically reset. Please refer to Section 7.5.1, "Basic Control Register," on page 175 for additional information
on this register.
Note:
When operating in 10BASE-T or 100BASE-TX manual modes, the Auto-MDIX crossover time can be
extended via the Extend Manual 10/100 Auto-MDIX Crossover Time bit of the EDPD NLP / Crossover Time
Configuration Register. Refer to Section 7.5.8, "EDPD NLP / Crossover Time Configuration Register," on
page 182 for additional information.
FIGURE 5-19:
DIRECT CABLE CONNECTION VS. CROSS-OVER CABLE CONNECTION.
Note:
For maximum power savings, auto-negotiation should be disabled before enabling the General Power-
Down mode.
1
2
3
4
5
6
7
8
TXP
TXN
RXP
Not Used
Not Used
RXN
Not Used
Not Used
1
2
3
4
5
6
7
8
TXP
TXN
RXP
Not Used
Not Used
RXN
Not Used
Not Used
Direct Connect Cable
RJ-45 8-pin straight-through
for 10BASE-T/100BASE-TX
signaling
1
2
3
4
5
6
7
8
TXP
TXN
RXP
Not Used
Not Used
RXN
Not Used
Not Used
1
2
3
4
5
6
7
8
TXP
TXN
RXP
Not Used
Not Used
RXN
Not Used
Not Used
Cross-Over Cable
RJ-45 8-pin cross-over for
10BASE-T/100BASE-TX
signaling



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