 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
LAN9500AI 数据表(PDF) 145 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN9500AI 数据表(HTML) 145 Page - Microchip Technology |
|
|
145 / 213 page  2010 - 2015 Microchip Technology Inc. DS00001875A-page 145 LAN950x 7.3.19 DATA PORT DATA 1 REGISTER (DP_DATA1) The Data Port Data register holds the write data for a write access and the resultant read data for a read access. Before reading the this register for the result of a read operation, the Data Port Ready bit should be checked. The Data Port Ready bit must indicate the data port is ready. Otherwise the read operation is still in progress. This register required when accessing the RX TLI and TX TLI RAMs. These RAMs have a width of 37 bits. Address: 050h Size: 32 bits Bits Description Type Default 31:5 RESERVED RO - 4:0 Data Port Data [36:32] R/W 00h |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
