USB224X

DS00001979A-page 36

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10.2

Ceramic Resonator

24 MHz

± 350 ppm

10.3

External Clock

50% Duty cycle

± 10%, 24 MHz ± 350 ppm, Jitter < 100 ps rms.

The external clock is recommended to conform to the signaling level designated in the JESD76-2 specification on 1.8

V CMOS Logic. XTAL2 should be treated as a no connect or drive only a CMOS-like buffer.

FIGURE 10-3:

CERAMIC RESONATOR USAGE WITH MCHP IC

XTAL1

XTAL2

1 M

24 MHz

Ceramic

Resonator