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RPC564L60L5BOSY 数据表(PDF) 107 Page - STMicroelectronics

部件名 RPC564L60L5BOSY
功能描述  microcontroller for Aerospace and Defense, SIL3/ASILD safety applications
PDF  137 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

RPC564L60L5BOSY 数据表(HTML) 107 Page - STMicroelectronics

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RPC56EL60L5
Electrical characteristics
136
Calling f0 the bandwidth of the source signal (and as a consequence the cut-off frequency of
the anti-aliasing filter, fF), according to the Nyquist theorem the conversion rate fC must be
at least 2f0; it means that the constant time of the filter is greater than or at least equal to
twice the conversion period (TC). Again the conversion period TC is longer than the
sampling time TS, which is just a portion of it, even when fixed channel continuous
conversion mode is selected (fastest conversion rate at a specific channel): in conclusion it
is evident that the time constant of the filter RFCF is definitively much higher than the
sampling time TS, so the charge level on CS cannot be modified by the analog signal source
during the time in which the sampling switch is closed.
The considerations above lead to impose new constraints on the external circuit, to reduce
the accuracy error due to the voltage drop on CS; from the two charge balance equations
above, it is simple to derive Equation 11 between the ideal and real sampled voltage on CS:
Equation 11
From this formula, in the worst case (when VA is maximum, that is for instance 5 V),
assuming to accept a maximum error of half a count, a constraint is evident on CF value:
Equation 12
V
A2
V
A
------------
C
P1
C
P2
+C
F
+
C
P1
C
P2
+C
F
C
S
++
--------------------------------------------------------
=
C
F
8192
C
S
Table 24. ADC conversion characteristics
Symbol
Parameter
Conditions(1)
Min
Typ Max
Unit
fCK
S
R
ADC Clock frequency (depends on ADC
configuration)
(The duty cycle depends on AD_CK(2)
frequency)
—3
60
MHz
fs
S
R
Sampling frequency
983.
6(3)
KHz
tsample
D Sample time(4)
60 MHz
383
ns
teval
D Evaluation time(5)
60 MHz
600
ns
CS
(6)
D ADC input sampling capacitance
7.32
pF
CP1
(6)
D ADC input pin capacitance 1
5((7))
pF
CP2
(6)
D ADC input pin capacitance 2
0.8
pF
RSW1
(6)
D Internal resistance of analog source
VREF range = 4.5 to 5.5 V
0.3
k
VREF range = 3.0 to 3.6 V
875
W
RAD
(6)
D Internal resistance of analog source
825
W
INL
P Integral non linearity
–3
3
LSB
DNL
P Differential non linearity(8)
—–1
2
LSB
OFS
T Offset error
–6
6
LSB



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