POWERSTEP01TR datasheet(72/92 Pages) STMICROELECTRONICS

72 / 92 page

Programming manual

powerSTEP01

72/92

DocID025022 Rev 5

The CMD_ERROR flag is active high and indicates that the command received by SPI can't

be performed or does not exist at all.

The SW_F report the SW input status (low for open and high for closed).

The SW_EVN flag is active high and indicates a switch turn-on event (SW input falling

edge).

TH_STATUS bits indicate the current device thermal status (see Section 7.12 on page 32):

UVLO, UVLO_ADC, OCD, STEP_LOSS_A, STEP_LOSS_B, CMD_ERROR, SW_EVN and

TH_STATUS bits are latched: when the respective conditions make them active (low or

high) they remain in that state until a GetStatus command is sent to the IC.

The BUSY bit reflects the BUSY pin status. The BUSY flag is low when a constant speed,

positioning or motion command is under execution and is released (high) after the

command have been completed.

The STCK_MOD bit is an active high flag indicating that the device is working in step clock

mode. In this case the step clock signal should be provided through STCK input pin.

The DIR bit indicates the current motor direction:

MOT_STATUS indicates the current motor status:

Any attempt to write to the register causes the command to be ignored and the

CMD_ERROR flag to rise.

Table 57. STATUS register TH_STATUS bits

TH_STATUS

Status

Normal

Warning

Bridge shutdown

Device shutdown

Table 58. STATUS register DIR bit

DIR

Motor direction

1Forward

Reverse

Table 59. STATUS register MOT_STATUS bits

MOT_STATUS

Motor status

Stopped

Acceleration

Deceleration

Constant speed

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