60

62

23

21

19

GRSTz

63

18

TEST

PWRCTL4/BATEN4

64

17

RSVD

RSVD

VDD33

61

20

USB_DP_UP

RSVD

USB_DM_UP

59

22

RSVD

RSVD

58

RSVD

57

24

USB_DM_DN4

56

25

USB_DP_DN4

RSVD

55

26

RSVD

RSVD

RSVD

54

27

NC

53

28

RSVD

XO

52

29

RSVD

XI

51

30

USB_DM_DN3

VDD33

50

31

USB_DP_DN3

USB_R1

49

32

1

48

2

47

3

46

4

45

5

44

6

43

16

33

15

34

14

35

13

36

12

37

11

38

10

39

7

42

8

41

9

40

TUSB4041I

SLLSEK3B – JULY 2015 – REVISED DECEMBER 2015

www.ti.com

6 Pin Configuration and Functions

PAP Package

64-Pin HTQFP With PowerPAD™

Top View

NC = No internal connection

Pin Functions

PIN

DESCRIPTION

NAME

NO.

CLOCK AND RESET SIGNALS

Global power reset. This reset brings all of the TUSB4041I device internal registers to

GRSTz

18

I

PU

the default state. When the GRSTz pin is asserted, the device is completely

nonfunctional.

Crystal input. This pin is the crystal input for the internal oscillator. The input may

XI

30

I

—

alternately be driven by the output of an external oscillator. When using a crystal, a 1-

M

Ω feedback resistor is required between the XI and XO pins.

(1)

I = Input, O = Output, I/O = Input/output, PU = Internal pullup resistor, PD = Internal pulldown resistor, and PWR = Power signal

4

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