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TUSB4041IPAPR 数据表(PDF) 20 Page - Texas Instruments |
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TUSB4041IPAPR 数据表(HTML) 20 Page - Texas Instruments |
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20 / 44 page ![]() TUSB4041I SLLSEK3B – JULY 2015 – REVISED DECEMBER 2015 www.ti.com 8.5.11 Device Configuration Register 2 Offset = Ah Figure 12. Device Configuration Register 2 7 6 5 4 3 2 1 0 RSVD customBCfeatu pwrctlPol HiCurAcpMode cpdEN RSVD autoModeEnz RSVD res En R-0 RW-0 RW-X R/RW-0 R/RW-0 RW-0 RW-X R-0 Table 13. Device Configuration Register 2 Field Descriptions Bit Field Type Reset Description Reserved 7 RSVD R 0 Read only, returns 0 when read. Custom battery charging feature enable This bit controls the ability to write to the battery charging feature configuration controls. 0 = The HiCurAcpModeEn and cpdEN bits are read only and the values 6 customBCfeatures RW 0 are loaded from the OTP ROM. 1 = The HiCurAcpModeEn and cpdEN, bits are R/W and can be loaded by EEPROM or written by SMBus from this register. This bit may be written simultaneously with HiCurAcpModeEn and cpdEN. Power enable polarity This bit is loaded at the deassertion of reset with the value of the PWRCTL_POL pin. 0 = PWRCTL polarity is active low. 5 pwrctlPol RW X 1 = PWRCTL polarity is active high. When the TUSB4041I device is in I2C mode, the TUSB4041I device loads this bit from the contents of the EEPROM. When the TUSB4041I device is in SMBUS mode, the value may be overwritten by an SMBus host. High-current ACP mode enable This bit enables the high-current tablet charging mode when the automatic battery charging mode is enabled for downstream ports. 0 = High-current divider mode disabled. Legacy current divider mode 4 HiCurAcpModeEn R/RW 0 enabled. 1 = High-current divider mode enabled This bit is read only unless the customBCfeatures bit is set to 1. If customBCfeatures is 0, the value of this bit reflects the value of the OTP ROM HiCurAcpModeEn bit. Enable device attach detection This bit enables device attach detection (such as a cell-phone detect) when auto mode is enabled. 0 = Device attach detect is disabled in auto mode. 3 cpdEN RRW 0 1 = Device attach detect is enabled in auto mode. This bit is read only unless the customBCfeatures bit is set to 1. If customBCfeatures is 0, the value of this bit reflects the value of the OTP ROM cpdEN bit. 2 RSVD RW 0 Reserved 20 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TUSB4041I |
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