TD35 datasheet(9/19 Pages) STMICROELECTRONICS

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TD351

Functional description

Doc ID 10977 Rev 2

9/19

Ta is approximately given by (see Figure 5):

The turn-off delay (Ta) is also used to delay the input signal to prevent distortion of input

pulse width.

The two-level turn-off sequence can be disabled by connecting the LVOFF pin to VH and

connecting the CD pin to VREF with a 4.7 k

Ω resistor.

5.5

Minimum input ON-time

Input signals with ON-time smaller than Ta are ignored.

ON-time signals larger than Ta+2

del

d (Rdel is the internal discharge switch resistance,

Cd is the external timing capacitor) are transmitted to the output stage after the Ta delay, with

minimum width distortion (

∆Tw=Twout-Twin).

For ON-time input signals close to Ta (between Ta and Ta+2

del

d), the two-level duration

is slightly reduced and the total output width can be smaller than the input width (see

Figure 7).

5.6

Output stage

The output stage is able to sink/source 1.7 A/1.3 A (typical) at 25 °C and 1.0 A/0.75 A min.

over the full temperature range. This current capability is specified near the usual IGBT

Miller plateau.

5.7

Undervoltage protection

Undervoltage detection protects the application in the event of a low VH supply voltage

(during startup or a fault situation). During undervoltage, the OUT pin is driven low (active

pull-down for VH>2V, and passive pull-down for VH<2V).

a µs

()

0.7

d kΩ

() C

d nF

()

⋅⋅

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