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AD6679 数据表(PDF) 63 Page - Analog Devices |
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AD6679 数据表(HTML) 63 Page - Analog Devices |
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63 / 81 page  Data Sheet AD6679 Rev. B | Page 63 of 81 Table 36. Pin Mapping Comparison Between Parallel Interleaved, Channel Multiplexed, and Byte Modes Pin No. Parallel Interleaved Output Channel Multiplexed (Even/Odd) Output Byte Output K13, K14 DCO−, DCO+ DCO−, DCO+ DCO−, DCO+ L13, L14 OVR−, OVR+ OVR−, OVR+ FCO−, FCO+ M13, M14 D13−, D13+ A D12/D13−, A D12/D13+ STATUS−, STATUS+ N14, P14 D12−, D12+ A D10/D11−, A D10/D11+ DATA7−, DATA7+ N13, P13 D11−, D11+ A D8/D9−, A D8/D9+ DATA6−, DATA6+ N12, P12 D10−, D10+ A D6/D7−, A D6/D7+ DATA5−, DATA5+ N11, P11 D9−, D9+ A D4/D5−, A D4/D5+ DATA4−, DATA4+ N10, P10 D8−, D8+ A D2/D3−, A D2/D3+ DATA3−, DATA3+ N9, P9 D7−, D7+ A D0/D1−, A D0/D1+ DATA2−, DATA2+ N5, P5 D6−, D6+ B D12/D13−, B D12/D13+ DATA1−, DATA1+ N4, P4 D5−, D5+ B D10/D11−, B D10/D11+ DATA0−, DATA0+ N3, P3 D4−, D4+ B D8/D9−, B D8/D9+ Not applicable N2, P2 D3−, D3+ B D6/D7−, B D6/D7+ Not applicable N1, P1 D2−, D2+ B D4/D5−, B D4/D5+ Not applicable M2, M1 D1−, D1+ B D2/D3−, B D2/D3+ Not applicable N6, P6 D0−, D0+ B D0/D1−, B D0/D1+ Not applicable |
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