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LP38513 数据表(PDF) 11 Page - Texas Instruments |
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LP38513 数据表(HTML) 11 Page - Texas Instruments |
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11 / 25 page ![]() Load Transient Line Transient VIN VOUT NOM ~89% ~85% VERROR Power- Up Power- Down ~2.25V ~1.25V ~2.50V LP38513 www.ti.com SNVS361E – JULY 2007 – REVISED NOVEMBER 2015 7.4 Device Functional Modes 7.4.1 Enable Operation The Enable on/off threshold is typically 850 mV and has no hysteresis. The voltage signal must rise and fall cleanly, and promptly, through this threshold. The EN pin has no internal pullup or pulldown to establish a default condition and, as a result, this pin must be terminated either actively or passively. If the EN pin is driven from a single ended device (such as the collector of a discrete transistor) a pullup resistor to VIN, or a pulldown resistor to ground, is required for proper operation. A 1-kΩ to 100-kΩ resistor can be used as the pullup or pulldown resistor to establish default condition for the EN pin. The resistor value selected must be appropriate to swamp out any leakage in the external single-ended device, as well as any stray capacitance. If the EN pin is driven from a source that actively pulls high and low (such as a CMOS rail-to-rail comparator output), the pullup or pulldown resistor is not required. If the application does not require the enable function, the EN pin must be connected directly to the adjacent IN pin. 7.4.2 ERROR Flag Operation The internal ERROR flag comparator has an open-drain output stage. Hence, the ERROR pin requires an external pullup resistor. The value of the pullup resistor must be in the range of 2 k Ω to 20 kΩ and must be connected to the LP38513 OUT pin. The ERROR flag pin must not be pulled up to any voltage source higher than VIN as current flow through an internal parasitic diode may cause unexpected behavior. When the input voltage is less than typically 1.25 V the status of the ERROR flag output is not reliable. The ERROR flag pin must be connected to ground if this function is not used. The timing diagram in Figure 16 shows the relationship between the ERROR flag and the output voltage when a pullup resistor is connected to the output voltage pin. The timing diagram in Figure 17 shows the relationship between the ERROR flag and the output voltage when the pullup resistor is connected to the input voltage. Figure 16. ERROR Flag Operation (see Figure 18) Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LP38513 |
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