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ADC1001 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 ADC1001
功能描述  10-Bit P Compatible A/D Converter
PDF  9 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

ADC1001 数据表(HTML) 2 Page - National Semiconductor (TI)

  ADC1001 Datasheet HTML 1Page - National Semiconductor (TI) ADC1001 Datasheet HTML 2Page - National Semiconductor (TI) ADC1001 Datasheet HTML 3Page - National Semiconductor (TI) ADC1001 Datasheet HTML 4Page - National Semiconductor (TI) ADC1001 Datasheet HTML 5Page - National Semiconductor (TI) ADC1001 Datasheet HTML 6Page - National Semiconductor (TI) ADC1001 Datasheet HTML 7Page - National Semiconductor (TI) ADC1001 Datasheet HTML 8Page - National Semiconductor (TI) ADC1001 Datasheet HTML 9Page - National Semiconductor (TI)  
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Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC) (Note 3)
6.5V
Logic Control Inputs
−0.3V to +18V
Voltage at Other Inputs and Outputs
−0.3V to (V
CC+0.3V)
Storage Temperature Range
−65˚C to +150˚C
Package Dissipation at T
A=25˚C
875 mW
Lead Temp. (Soldering, 10 seconds)
300˚C
ESD Susceptibility (Note 10)
800V
Operating Conditions (Notes 1, 2)
Temperature Range
T
MIN ≤TA≤TMAX
ADC1001CCJ
−40˚C
≤T
A≤+85˚C
ADC1001CCJ-1
0˚C
≤T
A≤+70˚C
Range of V
CC
4.5 V
DC to 6.3 VDC
Converter Characteristics
Converter Specifications: V
CC=5VDC,VREF/2=2.500 VDC,TMIN≤TA≤TMAX and fCLK=410 kHz unless otherwise specified.
Parameter
Conditions
MIn
Typ
Max
Units
Linearity Error
±1
LSB
Zero Error
±2
LSB
Full-Scale Error
±2
LSB
Total Ladder Resistance (Note 9)
Input Resistance at Pin 9
2.2
4.8
K
Ω
Analog Input Voltage Range
(Note 4) V(+) or V(−)
GND−0.05
V
CC+0.05
V
DC
DC Common-Mode Error
Over Analog Input Voltage Range
±1⁄8
LSB
Power Supply Sensitivity
V
CC=5VDC±5% Over
±1⁄8
LSB
Allowed V
IN(+) and VIN(−)
Voltage Range (Note 4)
AC Electrical Characteristics
Timing Specifications: V
CC=5VDCand TA=25˚C unless otherwise specified.
Symbol
Parameter
Conditions
MIn
Typ
Max
Units
T
c
Conversion Time
(Note 5)
80
90
1/f
CLK
f
CLK=410 kHz
195
220
µs
f
CLK
Clock Frequency
(Note 8)
100
1260
kHz
Clock Duty Cycle
40
60
%
CR
Conversion Rate In Free-Running
INTR tied to WR with
4600
conv/s
Mode
CS =0V
DC,fCLK=410 kHz
t
W(WR)L
Width of WR Input (Start Pulse
CS =0V
DC (Note 6)
150
ns
Width)
t
ACC
Access Time (Delay from
C
L=100 pF
170
300
ns
Falling Edge of RD to Output
Data Valid)
t
1H,t0H
TRI-STATE® Control (Delay
C
L=10 pF, RL=10k
125
200
ns
from Rising Edge of RD to
(See TRI-STATE Test
Hi-Z State)
Circuits)
t
WI,tRI
Delay from Falling Edge
300
450
ns
of WR or RD to Reset of INTR
t
1rs
INTR to 1st Read Set-Up Time
550
400
ns
C
IN
Input Capacitance of Logic
5
7.5
pF
Control Inputs
C
OUT
TRI-STATE Output
5
7.5
pF
Capacitance (Data Buffers)
www.national.com
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