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ADC12062EVAL 数据表(PDF) 5 Page - National Semiconductor (TI) |
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ADC12062EVAL 数据表(HTML) 5 Page - National Semiconductor (TI) |
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5 / 20 page ![]() Note 5 Human body model 100 pF discharged through a 15 kX resistor Machine model ESD rating is 200V Note 6 See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ or the section titled ‘‘Surface Mount’’ found in a current National Semiconductor Linear Data Book for other methods of soldering surface mount devices Note 7 Typicals are at a25 C and represent most likely parametric norm Note 8 Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level) Note 9 Integral Linearity Error is the maximum deviation from a straight line between the measured offset and full scale endpoints Note 10 Dynamic testing of the ADC12062 is done using the ADC IN input The input multiplexer adds harmonic distortion at high frequencies See the graph in the Typical Performance Characteristics section for a typical graph of THD performance vs input frequency with and without the input multiplexer Note 11 The signal-to-noise ratio is the ratio of the signal amplitude to the background noise level Harmonics of the input signal are not included in its calculation Note 12 The contributions from the first nine harmonics are used in the calculation of the THD Note 13 Effective Number of Bits (ENOB) is calculated from the measured signal-to-noise plus distortion ratio (SINAD) using the equation ENOB e (SINAD b 176)602 Note 14 The digital power supply current takes up to 10 seconds to decay to its final value after PD is pulled low This prohibits production testing of the standby current Some parts may exhibit significantly higher standby currents than the 20 mA typical Note 15 Power Supply Sensitivity is defined as the change in the Offset Error or the Full Scale Error due to a change in the supply voltage TRI-STATE Test Circuit and Waveforms TLH11490 – 2 TLH11490 – 3 TLH11490 – 4 TLH11490 – 5 5 |
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