Micro Crystal

Real Time Clock / Calendar Module

RV-8564

9/40

8. REGISTER ORGANIZATION

8.1. REGISTER OVERVIEW

Address

Function

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00h

Control / Status 1

TEST1

N

STOP

N

TESTC

N

N

N

01h

Control / Status 2

N

N

N

TI/TP

AF

TF

AIE

TIE

02h

Seconds

VL

40

20

10

8

4

2

1

03h

Minutes

X

40

20

10

8

4

2

1

04h

Hours

X

X

20

10

8

4

2

1

05h

Days

X

X

20

10

8

4

2

1

06h

Weekdays

X

X

X

X

X

4

2

1

07h

Months / Century

C

X

X

10

8

4

2

1

08h

Years

80

40

20

10

8

4

2

1

09h

Minute Alarm

AE_M

40

20

10

8

4

2

1

0Ah

Hour Alarm

AE_H

X

20

10

8

4

2

1

0Bh

Day Alarm

AE_D

X

20

10

8

4

2

1

0Ch

Weekday Alarm

AE_W

X

X

X

X

4

2

1

0Dh

CLKOUT Frequency

FE

X

X

X

X

X

FD1

FD0

0Eh

Timer Control

TE

X

X

X

X

X

TD1

TD0

0Fh

Timer

128

64

32

16

8

4

2

1

Bit positions labeled as “X” are not implemented.

Bit positions labeled as “N” should always be written with logic 0.

8.2. CONTROL REGISTERS

8.2.1.CONTROL / STATUS 1 (address 00h…bits description)

Address

Function

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00h

Control / Status 1

TEST1

N

STOP

N

TESTC

N

N

N

Bit

Symbol

Value

Description

Reference

7

TEST1

0

1)

Must be set to logic 0 for normal operations

1

Test mode

6

N

0

2)

Default value

5

STOP

0

1)

RTC source clock runs

See section 9.5.

1

RTC divider chain flip-flops are asynchronously set to

logic 0

The RTC clock is stopped (CLKOUT at 32.768 kHz is

still available)

4

N

0

2)

Default value

3

TESTC

0

Must be set to logic 0 for normal operations

1

1)

Test mode

2 to 0

N

000

2)

Default value

Note:

The two bits: TEST1 and TESTC are for device testing. Make sure TEST1 and TESTC are set to 0 during normal

operation. If accidentally set to 1, they may modify the clock data or result in abnormal time.