CLC021

SMPTE 259M Digital Video Serializer with EDH

Generation and Insertion

General Description

The CLC021 SMPTE 259M Digital Video Serializer with EDH

Generation and Insertion is a monolithic integrated circuit

that encodes, serializes and transmits bit-parallel digital data

conforming to SMPTE 125M and 267M component video

and SMPTE 244M composite video standards. The CLC021

can also serialize other 8- or 10-bit parallel data. The

CLC021 operates at data rates from below 100 Mbps to over

400 Mbps. The serial data clock frequency is internally gen-

erated and requires no external frequency setting, trimming

or filtering components*.

Functions performed by the CLC021 include: parallel-to-

serial data conversion, ITU-R BT.601-4 input data clipping,

data encoding using the SMPTE polynomial (X

format conversion from NRZ to NRZI, parallel data clock

frequency multiplication and encoding with the serial data,

and differential, serial output data driving. The CLC021 has

circuitry for automatic EDH character and flag generation

and insertion per SMPTE RP-165. The CLC021 has an

exclusive built-in self-test (BIST) and video test pattern gen-

erator (TPG) with 16 component video test patterns: refer-

ence black, PLL and EQ pathologicals and modified colour

bars in 4:3 and 16:9 raster formats for NTSC and PAL

formats*.

The CLC021 has inputs for enabling sync detection, non-

SMPTE mode operation, enabling the EDH function, NRZ/

NRZI mode control and an external reset control. Outputs

are provided for H, V and F bits, new TRS sync character

position indication, ancilliary data header detection, NTSC/

PAL raster indication and PLL lock detect. Separate power

pins for the output driver, VCO and the serializer improve

power supply rejection, output jitter and noise performance.

The CLC021AVGZ-5.0V is powered by a single +5V supply.

The CLC021AVGZ-3.3V is powered by a single +3.3V sup-

ply. Power dissipation is typically 235 mW including two 75

Ω

back-matched output loads. The device is packaged in a

JEDEC metric 44-lead PQFP.

Features

n

SMPTE 259M serial digital video standard compliant

n

Supports all NTSC and PAL standard component and

composite serial video data rates

n

No external serial data rate setting or VCO filtering

n

n

Built-in self-test (BIST) and video test pattern generator

n

Automatic EDH character and flag generation and

insertion per SMPTE RP 165

n

Non-SMPTE mode operation as parallel-to-serial

converter

n

NRZ-to-NRZI conversion control

n

HCMOS/LSTTL-compatible data and control inputs and

outputs for CLC021AVGZ-5.0, LVCMOS for

CLC021AVGZ-3.3

n

75

Ω ECL-compatible, differential, serial cable-driver

outputs

n

Single power supply operation: 5V (CLC021AVGZ-5.0)

or 3.3V (CLC021AVGZ-3.3) in TTL or ECL systems

n

Low power: typically 235 mW

n

JEDEC 44-lead metric PQFP package

n

Commercial temperature range 0˚C to +70˚C

Applications

n

SMPTE 259M parallel-to-serial digital video interfaces

for:

— Video cameras

— VTRs

— Telecines

— Video test pattern generators and digital video test

equipment

— Video signal generators

n

Non-SMPTE video applications

n

Other high data rate parallel/serial video and data

applications

Typical Application

10136812

July 2003

© 2003 National Semiconductor Corporation

DS101368

www.national.com