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CLC449AMC 数据表(PDF) 4 Page - National Semiconductor (TI) |
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CLC449AMC 数据表(HTML) 4 Page - National Semiconductor (TI) |
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4 / 12 page ![]() http://www.national.com 4 CLC449 Typical Performance Characteristics (T A = 25°C, Vcc = + 5V, Rf = 250Ω,Av = +2, RL = 100Ω) CLC449 OPERATION Frequency (Hz) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 Input VSWR Non-Inverting Inverting 0 100M 200M 300M 400M 500M Frequency (Hz) 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 Uncompensated Compensated 0 100M 200M 300M 400M 500M Frequency (Hz) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0 100M 200M 300M 400M 500M Output VSWR Reverse Isolation (S12) Gain Compression CLC449 Extended Application Information The following design and application topics will supply you with: • A comprehensive set of design parameters and design parameter adjustment techniques. • A set of formulas that support design parameter change prediction. • A series of common applications that the CLC449 supports. • A set of easy to use design guidelines for the CLC449. Additional design applications are possible with the CLC449. If you have application questions, call 1-800-272- 9959 in the U.S. to contact a technical staff member. DC Gain (Non-Inverting) The non-inverting DC voltage gain for the configuration shown in Figure 1 is: Figure 1: Non-Inverting Gain The normalized gain plots in the Typical Performance Characteristics section show different feedback resistors, Rf, for different gains. These values of Rf are recom- mended for obtaining the highest bandwidth with minimal peaking. The resistor Rt in Figure 1 provides DC bias for the non-inverting input. For Av ≤ 5, calculate the recommended Rf as follows: Rf ≅ 340 - Av • Ri, where Ri = 45Ω.For Av > 5, the minimum recommended feedback resistor is Rf = 100Ω. Select Rg to set the DC gain: Accuracy of DC gain is usually limited by the tolerance of the external resistors Rf and Rg. DC Gain (Unity Gain Buffer) Unity gain buffers are easily designed with a current- feedback amplifier as long as the recommended feed- back resistor Rf = 402Ω is used and Rg = ∞, i.e. open. Parasitic capacitance at the inverting node may require a slight increase of the feedback resistor Rf to maintain a flat frequency response. DC Gain (Inverting) The inverting DC voltage gain for the configuration shown in Figure 2 is: A1 R R V f g =+ + - CLC449 Rf 0.1 µF 6.8 µF Vo Vin Vcc Rg Rt 3 2 4 7 6 0.1 µF 6.8 µF Vee R R A1 g f v = − A R R v f g =− |
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