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CLC5957PCASM 数据表(PDF) 2 Page - National Semiconductor (TI) |
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CLC5957PCASM 数据表(HTML) 2 Page - National Semiconductor (TI) |
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2 / 12 page  http://www.national.com 2 CLC5957 Electrical Characteristics (V cc= +5V, 66MSPS; unless specified) (Tmin = -40°C, Tmax = +85°C) PARAMETERS CONDITIONS TEMP RATINGS UNITS NOTES MIN TYP MAX 2 RESOLUTION Full 12 Bits 1 DIFF. INPUT VOLTAGE RANGE Full 2.048 V MAXIMUM CONVERSION RATE Full 70 75 MSPS 1 SNR fin = 25MHz, Ain = -1dBFS +25°C 63 66 dBFS 1 SFDR fin = 25MHz, Ain = -1dBFS +25°C 66 74 dBc 1 NO MISSING CODES fin = 5MHz, Ain = -1dBFS +25°C Guaranteed 1 DYNAMIC PERFORMANCE large-signal bandwidth Ain = -3dBFS +25°C 300 MHz overvoltage recovery time Ain = 1.5FS (0.01%) +25°C 12 ns effective aperture delay (Ta) +25°C -0.41 ns aperture jitter +25°C 0.3 ps(rms) NOISE AND DISTORTION signal-to-noise ratio (w/o 50 harmonics) fin = 5.0MHz Ain = -1dBFS Full 67 dBFS fin = 25MHz Ain = -1dBFS Full 60 66 dBFS 1 fin = 75MHz Ain = -3dBFS Full 65 dBFS fin = 150MHz Ain = -15dBFS Full 66 dBFS fin = 250MHz Ain = -15dBFS Full 66 dBFS spurious-free dynamic range fin = 5.0MHz Ain = -1dBFS Full 74 dBc fin = 25MHz Ain = -1dBFS Full 60 74 dBc 1 fin = 75MHz Ain = -3dBFS Full 72 dBc fin = 150MHz Ain = -15dBFS Full 69 dBc fin = 250MHz Ain = -15dBFS Full 65 dBc intermodulation distortion fin1 = 149.84MHz, fin2 = 149.7MHz Ain = -10dBFS +25°C 68 dBFS fin1 = 249.86MHz, fin2 = 249.69MHz Ain = -10dBFS +25°C 58 dBFS dithered performance spurious-free dynamic range fin = 19MHz Ain = -6dBFS +25°C 85 dBFS intermodulation distortion fin1 = 74MHz, fin2 = 75MHz Ain = -12dBFS +25°C 83 dBFS DC ACCURACY AND PERFORMANCE differential non-linearity fin = 5MHz, Ain = -1dBFS Full ±0.65 LSB integral non-linearity fin = 5MHz, Ain = -1dBFS Full ±1.5 LSB no missing codes fin = 5MHz, Ain = -1dBFS Full Guaranteed 1 offset error Full -30 0 30 mV 1 gain error Full 1.2 %FS Vref Full 2.2 2.37 2.6 V 1 ANALOG INPUTS analog differential input voltage range Full 2.048 Vpp analog input resistance (single ended) Full 500 Ω analog input resistance (differential) Full 1000 Ω analog input capacitance (single-ended) Full 2 pF ENCODE INPUTS (Universal) VIH +25°C 5 V 3 VIL +25°C 0 V 3 differential input swing +25°C 0.2 V 3 DIGITAL OUTPUTS output voltage logic LOW +25°C 0.01 0.4 V 1 OUTLEV = 1 (open) logic HIGH +25°C 3.2 3.5 3.8 V 1 OUTLEV = 0 (GND) logic HIGH +25°C 2.4 2.7 3.0 V 1 TIMING (C load < 7pF) maximum conversion rate Full 70 75 MSPS 1 minimum conversion rate +25°C 10 MSPS pulse width high Full 7.2 ns pulse width low Full 7.2 ns pipeline latency Full 3.0 clk cycle falling ENCODE to output change (50%) (Tod) +25°C 10 ns rising ENCODE to DAV change (50%) (Tdv) +25°C 9.6 ns |
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