8516FY

www.icst.com/products/hiperclocks.html

REV. B FEBRUARY 21, 2006

11

Integrated

Circuit

Systems, Inc.

ICS8516

A general LVDS interface is shown in Figure 3. In a 100

Ω

differential transmission line environment, LVDS drivers re-

quire a matched load termination of 100

Ω across near the

receiver input. For a multiple LVDS outputs buffer, if only par-

tial outputs are used, it is recommended to terminate the un-

used outputs.

3.3V

R1

100

Zo = 50 Ohm

LVDS_Driver

HiPerClockS

CLK

nCLK

Zo = 50 Ohm

3.3V

C5

0.1u

(U1-12)

Zo = 50 Ohm

Zo = 50 Ohm

(U1-25)

LVDS_input

+

-

(U1-31)

Zo = 50 Ohm

C3

0.1u

C6

0.1u

U1

8516

13

14

15

16

17

18

19

20

21

22

23

24

48

47

46

45

44

43

42

41

40

39

38

37

nQ1

Q1

nQ0

Q0

GND

nCLK

CLK

GND

Q15

nQ15

Q14

nQ14

Q6

nQ6

Q7

nQ7

GND

OE1

OE2

GND

nQ8

Q8

nQ9

Q9

Zo = 50 Ohm

R16

100

Zo = 50 Ohm

VDD=3.3V

LVDS_input

+

-

Zo = 50 Ohm

Zo = 50 Ohm

Zo = 50 Ohm

VDD=3.3V

R10

100

C4

0.1u

C2

0.1u

LVDS_Driver

R17

100

LVDS_input

+

-

(U1-1)

Decoupling capacitors located near the power pins

(U1-6)

(U1-36)

R1

100

C1

0.1u

Figure 4 shows a schematic example of ICS8516. In this ex-

ample, the input is driven by an LVDS driver. For LVDS buffer,

it is recommended to terminate the unused outputs for better

signal integrity. The decoupling capacitors should be physi-

cally located near the power pin.