MSP430F435IPZ datasheet(13/85 Pages) TI

13 / 85 page

MSP430x43x, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344A – JANUARY 2002 – REVISED FEBRUARY 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

instruction set (continued)

Table 2. Address Mode Descriptions

ADDRESS MODE

SYNTAX

EXAMPLE

OPERATION

n n

MOV Rs,Rd

MOV R10,R11

R10

––> R11

Indexed

n n

MOV X(Rn),Y(Rm)

MOV 2(R5),6(R6)

M(2+R5)––> M(6+R6)

Symbolic (PC relative)

n n

MOV EDE,TONI

M(EDE) ––> M(TONI)

Absolute

n n

MOV and MEM,and

TCDAT

M(MEM) ––> M(TCDAT)

Indirect

MOV @Rn,Y(Rm)

MOV @R10,Tab(R6)

M(R10) ––> M(Tab+R6)

Indirect

autoincrement

MOV @Rn+,Rm

MOV @R10+,R11

M(R10) ––> R11

R10 + 2––> R10

Immediate

MOV #X,TONI

MOV #45,TONI

#45

––> M(TONI)

NOTE: S = source

D = destination

Computed branches (BR) and subroutine call (CALL) instructions use the same address modes as other

instructions. These address modes provide indirect addressing, which is ideally suited for computed branches

and calls. The full use of this programming capability results in a program structure which is different from

structures used with conventional 8- and 16-bit controllers. For example, numerous routines can be easily

designed to deal with pointers and stacks instead of using flag-type programs for flow control.

operating modes

The MSP430 operating modes support various advanced requirements for ultralow power and ultralow energy

consumption. The intelligent management of the operations during the different module operation modes and

CPU states achieves this. The requirements are fully supported during interrupt event handling. An interrupt

event awakens the system from each of the various operating modes and returns with the RETI instruction to

the mode that was selected before the interrupt event. The clocks used are ACLK, SMCLK and MCLK.

ACLK is the crystal frequency, MCLK and SMCLK are either multiples of ACLK or come from the crystal

oscillators. MCLK and SMCLK are used as the system clock and subsystem clock.

The software can configure six operating modes:

D Active mode AM; SCG1=0, SCG0=0, OscOff=0, CPUOff=0:

CPU clocks are active

D Low-power mode 0 (LPM0); SCG1=0, SCG0=0, OscOff=0, CPUOff=1:

–

CPU is disabled

ACLK and SMCLK remain active. MCLK is disabled

FLL+ Loop control remains active

D Low-power mode 1 (LPM1); SCG1=0, SCG0=1, OscOff=0, CPUOff=1:

–

CPU is disabled

FLL+ Loop control is disabled

ACLK and SMCLK remain active. MCLK is disabled

D Low-power mode 2 (LPM2); SCG1=1, SCG0=0, OscOff=0, CPUOff=1:

–

CPU is disabled

MCLK and FLL+ loop control and DCOCLK are disabled

DCO’s dc-generator remains enabled

ACLK remains active

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