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DP83266 数据表(PDF) 48 Page - National Semiconductor (TI) |
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DP83266 数据表(HTML) 48 Page - National Semiconductor (TI) |
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48 / 152 page  70 Control Information (Continued) TABLE 7-6 MAC Parameter RAM Addr Name Register Contents 040 MLA0 MLA(47 – 40) 041 MLA1 MLA(39 – 32) 042 MLA2 MLA(31 – 24) 043 MLA3 MLA(23 – 16) 044 MLA4 MLA(15 – 8) 045 MLA5 MLA(7 – 0) 046 MSA0 MSA(15 – 8) 047 MSA1 MSA(7 – 0) 048 GLA0 GLA(47 – 40) 049 GLA1 GLA(39 – 32) 04A GLA2 GLA(31 – 24) 04B GLA3 GLA(23 – 16) 04C GLA4 GLA(15 – 8) 04D Reserved 04E GSA0 GSA(15 – 8) 04F Reserved 050 TREQ0 TREQ(31 – 24) 051 TREQ1 TREQ(23 – 16) 052 TREQ2 TREQ(15 – 8) 053 TREQ3 TREQ(7 – 0) 054 TBT0 TBT(31 – 24) 055 TBT1 TBT(23 – 16) 056 TBT2 TBT(15 – 8) 057 TBT3 TBT(7 – 0) 058 FGM0 FGM(7 – 0) 059 FGM1 FGM(F – 8) 05A0 – 5F Reserved 060 PGM10 PGM(87 – 80) 061 PGM11 PGM(8F – 88) 062 PGM12 PGM(97 – 90) Addr Name Register Contents 063 PGM13 PGM(9F – 98) 064 PGM14 PGM(A7 – A0) 065 PGM15 PGM(AF – A8) 066 PGM16 PGM(B7 – B0) 067 PGM17 PGM(BF – B8) 068 PGM18 PGM(C7 – C0) 069 PGM19 PGM(CF – C8) 06A PGM1A PGM(D7 – D0) 06B PGM1B PGM(DF – D8) 06C PGM1C PGM(E7 – E0) 06D PGM1D PGM(EF – E8) 06E PGM1E PGM(F7 – F0) 06F PGM1F PGM(FF – F8) 070 PGM0 PGM(7 – 0) 071 PGM1 PGM(F – 8) 072 PGM2 PGM(17 – 10) 073 PGM3 PGM(1F – 18) 074 PGM4 PGM(27 – 20) 075 PGM5 PGM(2F – 28) 076 PGM6 PGM(37 – 30) 077 PGM7 PGM(3F – 38) 078 PGM8 PGM(47 – 40) 079 PGM9 PGM(4F – 48) 07A PGMA PGM(57 – 50) 07B PGMB PGM(5F – 58) 07C PGMC PGM(67 – 60) 07D PGMD PGM(6F – 68) 07E PGME PGM(77 – 70) 07F PGMF PGM(7F – 78) 732 MAC CountersTimer Thresholds The MAC event counters and timer thresholds are always readable and are writable in Stop mode 48 |
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