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DAC7545LP 数据表(PDF) 2 Page - Texas Instruments

部件名 DAC7545LP
功能描述  CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTER Microprocessor Compatible
PDF  13 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

DAC7545LP 数据表(HTML) 2 Page - Texas Instruments

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DAC7545
2
SBAS150A
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
T
A = +25°C, unless otherwise noted.
VDD to DGND ........................................................................... –0.3V, +17
Digital Input to DGND ............................................................... –0.3V, VDD
VRFB, VREF, to DGND ........................................................................ ±25V
VPIN 1 to DGND ........................................................................ –0.3V, VDD
AGND to DGND ........................................................................ –0.3V, VDD
Power Dissipation: Any Package to +75
°C .................................... 450mW
Derates above +75
°C by ................................ 6mW/°C
Operating Temperature:
Commercial J, K, L, and GL ........................................... –40
°C to +85°C
Storage Temperature ...................................................... –65
°C to +150°C
Lead Temperature (soldering, 10s) ............................................... +300
°C
NOTE: (1) Stresses above those listed above may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at
these or any other condition above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
SPECIFIED
RELATIVE
GAIN ERROR (LSB)
PACKAGE
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
ACCURACY (LSB)
VDD = +5V
PACKAGE-LEAD DESIGNATOR(1)
RANGE
MARKING
NUMBER
MEDIA, QUANTITY
DAC7545
±2
±20
SO-20
DW
–40
°C to +85°C DAC7545JU
DAC7545JU
Rails, 38
"
±1
±10
"
"
"
DAC7545KU
DAC7545KU
Rails, 38
DAC7545
±1/2
±5
SO-20
DW
–40
°C to +85°C DAC7545LU
DAC7545LU
Rails, 38
"
±1/2
±2
"
"
"
DAC7545GLU DAC7545GLU
Rails, 38
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
PACKAGE/ORDERING INFORMATION
PIN CONNECTIONS
DAC7545
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OUT 1
AGND
DGND
(MSB) DB
11
DB
10
DB
9
DB
8
DB
7
DB
6
DB
5
R
FB
V
REF
V
DD
WR
CS
DB
0 (LSB)
DB
1
DB
2
DB
3
DB
4
Top View
SO
WRITE CYCLE TIMING DIAGRAM
Mode Selection
Write Mode
Hold Mode
CS and WR low, DAC responds
Either CS or WR high, data bus to
Data Bus (DB0-DB11) inputs.
(DB0-DB11) is locked out; DAC
holds last data present when
WR or CS assumed high state.
NOTES: VDD = +5V, tR = tF = 20ns. VDD = +15V, tR = tF = 40ns. All inputs signal
rise and fall times measured from 10% to 90% of VDD. Timing measurement
reference level is (VIH + VIL)/2.
t
DS
t
DH
V
IH
V
IL
Data
Valid
V
DD
0
t
WR
t
CS
t
CH
V
DD
0
V
DD
0
Data In
(DB
0-DB11)
WR
CS



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