Fractional-N Frequency Synthesizer

ADF4153

Rev. A

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FEATURES

RF bandwidth 500 MHz to 4 GHz

2.7 V to 3.3 V power supply

Programmable dual-modulus prescaler 4/5, 8/9

Programmable charge pump currents

3-wire serial interface

Analog and digital lock detect

Power-down mode

Pin compatible with the

ADF4110/ADF4111/ADF4112/ADF4113 and ADF4106

Programmable modulus on fractional-N synthesizer

Trade-off noise versus spurious performance

APPLICATIONS

CATV equipment

Base stations for mobile radio (GSM, PCS, DCS,

CDMA, WCDMA)

Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)

Wireless LANs

Communications test equipment

GENERAL DESCRIPTION

The ADF4153 is a fractional-N frequency synthesizer that

implements local oscillators in the upconversion and

downconversion sections of wireless receivers and transmitters.

It consists of a low noise digital phase frequency detector

(PFD), a precision charge pump, and a programmable reference

divider. There is a Σ-Δ based fractional interpolator to allow

programmable fractional-N division. The INT, FRAC, and

MOD registers define an overall N divider (N = (INT +

(FRAC/MOD))). In addition, the 4-bit reference counter (R

counter) allows selectable REFIN frequencies at the PFD input.

A complete phase-locked loop (PLL) can be implemented if the

synthesizer is used with an external loop filter and a voltage

controlled oscillator (VCO).

Control of all on-chip registers is via a simple 3-wire interface.

The device operate with a power supply ranging from 2.7 V to

3.3 V and can be powered down when not in use.

FUNCTIONAL BLOCK DIAGRAM

LOCK

DETECT

N-COUNTER

CP

RFCP3 RFCP2 RFCP1

REFERENCE

DATA

LE

24-BIT

DATA

REGISTER

CLOCK

AGND

DGND

DGND

CPGND

OUTPUT

MUX

MUXOUT

–

+

HIGH Z

PHASE

FREQUENCY

DETECTOR

ADF4153

THIRD ORDER

FRACTIONAL

INTERPOLATOR

MODULUS

REG

FRACTION

REG

INTEGER

REG

CURRENT

SETTING

×2

DOUBLER

4-BIT

R COUNTER

CHARGE

PUMP

Figure 1.