ADF4153 datasheet(21/24 Pages) AD

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ADF4153

Rev. A | Page 21 of 24

ADSP-2181 Interface

Figure 22 shows the interface between the ADF4153 and the

ADSP-21xx digital signal processor. As discussed previously, the

ADF4153 needs a 24-bit serial word for each latch write. The

easiest way to accomplish this using the ADSP-21xx family is to

use the autobuffered transmit mode of operation with alternate

framing. This provides a means for transmitting an entire block

of serial data before an interrupt is generated. Set up the word

length for eight bits and use three memory locations for each

24-bit word. To program each 24-bit latch, store the three 8-bit

bytes, enable the autobuffered mode, and write to the transmit

transfer.

ADSP-21xx

ADF4153

SCLOCK

SCLK

SDATA

MUXOUT

(LOCK DETECT)

TFS

I/O FLAGS

Figure 22. ADSP-21xx to ADF4153 Interface

PCB DESIGN GUIDELINES FOR CHIP SCALE

PACKAGE

The lands on the chip scale package (CP-20) are rectangular.

The printed circuit board pad for these should be 0.1 mm

longer than the package land length and 0.05 mm wider than

the package land width. The land should be centered on the pad.

This ensures that the solder joint size is maximized.

The bottom of the chip scale package has a central thermal pad.

The thermal pad on the printed circuit board should be at least

as large as this exposed pad. On the printed circuit board, there

should be a clearance of at least 0.25 mm between the thermal

pad and the inner edges of the pad pattern. This ensures that

shorting is avoided.

Thermal vias may be used on the printed circuit board thermal

pad to improve thermal performance of the package. If vias are

used, they should be incorporated in the thermal pad at 1.2 mm

pitch grid. The via diameter should be between 0.3 mm and

0.33 mm, and the via barrel should be plated with 1 oz. copper

to plug the via.

The user should connect the printed circuit board thermal pad

to AGND.

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