AS7C256A datasheet(5/9 Pages) ALSC

部件名	AS7C256A

功能描述	5V 32K X 8 CMOS SRAM (Common I/O)

PDF	9 Pages

Scroll/Zoom	100%

制造商	ALSC [Alliance Semiconductor Corporation]

网页	https://www.alliancememory.com

标志

5 / 9 page

AS7C256A

9/24/04; v.1.2

Alliance Semiconductor

P. 5 of 9

Write cycle (over the operating range)9

Write waveform 1 (WE controlled)9

Write waveform 2 (CE controlled)9

Parameter

Symbol

-10

-12

-15

-20

Unit Notes

Min

Max

Min

Max

Min

Max

Min

Max

Write cycle time

tWC

10–12–15–20–

Chip enable to write end

tCW

–

10–12–

Address setup to write end

tAW

–

10–12–

Address setup time

tAS

0–

Write pulse width

tWP

7–

8–

9–

–

Write recovery time

tWR

0–

Address hold from end of write

tAH

0–

Data valid to write end

tDW

5–

6–

8–

–

Data hold time

tDH

0–

3,4

Write enable to output in high Z

tWZ

–5

–6

–7

–8

3,4

Output active from write end

tOW

3–

3,4

tAW

tAH

tWC

Address

Din

Dout

tDH

tOW

tDW

tWZ

tWP

tAS

Data valid

tWR

tAW

Address

Din

Data valid

tCW

tDW

tDH

tAH

tWC

tAS

tWR

AS7C256A 数据表(PDF) 5 Page - Alliance Semiconductor Corporation

AS7C256A 数据表(HTML) 5 Page - Alliance Semiconductor Corporation

Html Pages

1 2 3 4 5 6 7 8 9

数据表下载