WM8750 datasheet(21/60 Pages) WOLFSON

21 / 60 page

Production Data

WM8750BL

PD, Rev 4.1, August 2012

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R5 (05h)

ADC and DAC

Control

6:5

ADCPOL

[1:0]

00 = Polarity not inverted

01 = L polarity invert

10 = R polarity invert

11 = L and R polarity invert

HPOR

Store dc offset when high-pass

filter disabled

1 = store offset

0 = clear offset

ADCHPD

ADC high-pass filter enable

(Digital)

HPFLREN = 0

1 = Disable high-pass filter on left

and right channels

0 = Enable high-pass filter on left

and right channels

HPFLREN = 1

0 = High-pass enabled on left,

disabled on right

1 = High-pass enabled on right,

disabled on left

R27 (1Bh)

HPFLREN

ADC high-pass filter left or right

enable

0 = High-pass filter enable/disable

on left and right channels

controlled by ADCHPD

1 = High-pass filter enabled on left

or right channel, as selected by

ADCHPD

Table 10 ADC Signal Path Control

HPFLREN

ADCHPD

HIGH PASS MODE

High-pass filter enabled on left and right

channels

High-pass filter disabled on left and right

channels

High-pass filter enabled on left channel,

disabled on right channel

High-pass filter disabled on left channel,

enabled on right channel

Table 11 ADC High Pass Filter Enable Modes

WM8750 数据表(PDF) 21 Page - Wolfson Microelectronics plc

WM8750 数据表(HTML) 21 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

数据表下载

链接网址

WM8750 数据表(PDF) 21 Page - Wolfson Microelectronics plc

WM8750 数据表(HTML) 21 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

数据表 下载

链接网址

数据表下载