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DP8440VLJ-40 数据表(PDF) 21 Page - National Semiconductor (TI) |
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DP8440VLJ-40 数据表(HTML) 21 Page - National Semiconductor (TI) |
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21 / 46 page ![]() 60 Refresh Modes (Continued) 62 EXTERNALLY CONTROLLED REFRESH The user can perform externally controlled refreshes by as- serting the DISRFSH and RFSH input signals When these inputs assert the DP844041 will perform a refresh as soon as possible If the user keeps RFSH asserted with DISRFSH already asserted the DRAM controller will burst refresh the memory for as long as the inputs are valid The controller will guarantee the RAS low and RAS precharge times for every refresh The user can choose to monitor the output RFRQ to externally request a refresh When RFRQ asserts it indicates that the refresh counter has expired TLF11718 – 11 FIGURE 15 Externally Controlled Refresh (2T of RAS Low and Precharge) 21 |
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