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LS830 数据表(PDF) 2 Page - Linear Integrated Systems

部件名 LS830
功能描述  ULTRA LOW LEAKAGE LOW DRIFT MONOLITHIC DUAL N-CHANNEL JFET
PDF  2 Pages
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制造商  LINEAR [Linear Integrated Systems]
网页  http://www.linearsystems.com
标志 LINEAR - Linear Integrated Systems

LS830 数据表(HTML) 2 Page - Linear Integrated Systems

  LS830 Datasheet HTML 1Page - Linear Integrated Systems LS830 Datasheet HTML 2Page - Linear Integrated Systems  
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Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261
SYMBOL
CHARACTERISTICS
MIN.
TYP.
MAX. UNITS
CONDITIONS
OUTPUT CONDUCTANCE
Y
OSS
Full Conduction
--
--
5
µmho
V
DG
= 10V
V
GS
= 0
Y
OS
Operating
--
--
0.5
µmho
V
DG
= 10V
I
D
= 30
µA
|Y
OS1-2
|
Differential
--
--
0.1
µmho
COMMON MODE REJECTION
CMR
-20 log |
∆V
GS1-2
/
∆V
DS
|--
90
--
dB
∆V
DS
= 10 to 20V
I
D
= 30
µA
CMR
-20 log |
∆V
GS1-2
/
∆V
DS
|--
90
--
dB
∆V
DS
= 5 to 10V
I
D
= 30
µA
NOISE
NF
Figure
--
--
1
dB
V
DS
= 10V
V
GS
= 0
R
G
= 10M
f= 100Hz
NBW= 6Hz
e
n
Voltage
--
20
70
nV/
√Hz V
DG
= 10V
I
D
= 30
µA f= 10Hz
NBW= 1Hz
CAPACITANCE
C
ISS
Input
--
--
3
pF
V
DS
= 10V
V
GS
= 0
f= 1MHz
C
RSS
Reverse Transfer
--
--
1.5
pF
V
DS
= 10V
V
GS
= 0
f= 1MHz
C
DD
Drain-to-Drain
--
--
0.1
pF
V
DG
= 10V
I
D
= 30
µA
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
TO-71
Six Lead
0.230
0.209
DIA.
DIA.
0.195
0.175
0.030
MAX.
0.500 MIN.
0.150
0.115
0.019
0.016
DIA.
6 LEADS
3
2
1
8
4
5
6
0.046
0.036
45°
0.048
0.028
0.100
0.050
7
TO-78
0.335
0.370
0.305
0.335
0.016
0.019
0.165
0.185
0.040
MAX.
DIM. A
0.016
0.021
DIM. B
MIN. 0.500
0.200
0.100
0.100
0.028
0.034
45°
1
2 3 4
5
6
7
8
0.029
0.045
SEATING
PLANE
S1 1
2
3
45
6
7
8
D1
SS
G1
S2
G2
SS
D2
P-DIP
S1 1
2
3
45
6
7
8
D1
SS
G1
S2
G2
SS
D2
0.150
0.158
(3.81)
(4.01)
0.188
0.197
0.228
0.244
(5.79)
(6.20)
SOIC
0.320
0.290
(8.13)
(7.37)
0.405
MAX.
(10.29)
(4.78)
(5.00)



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