DS26LS32AC/DS26LS32C/DS26LS32M/DS26LS33M

Quad Differential Line Receivers

General Description

The DS26LS32 and DS26LS32A are quad differential line re-

ceivers designed to meet the RS-422, RS-423 and Federal

Standards 1020 and 1030 for balanced and unbalanced digi-

tal data transmission.

The DS26LS32 and DS26LS32A have an input sensitivity of

DS26LS33 have an input sensitivity of 500 mV over the input

The DS26LS32A differ in function from the popular

DS26LS32 and DS26LS33 in that input pull-up and

pull-down resistors are included which prevent output oscil-

lation on unused channels.

Each version provides an enable and disable function com-

with 8 mA sink capability. Constructed using low power

Schottky processing, these devices are available over the

full military and commerical operating temperature ranges.

Features

n High differential or common-mode input voltage ranges

on the DS26LS33

DS26LS33

n DS26LS32 and DS26LS32A meet all requirements of

RS-422 and RS-423

n 6k minimum input impedance

n 100 mV input hysteresis on the DS26LS32 and

DS26LS32A, 200 mV on the DS26LS33

n Operation from a single 5V supply

n TRI-STATE outputs, with choice of complementary

output enables for receiving directly onto a data bus

Logic Diagram

DS005255-1

May 1999

© 1999 National Semiconductor Corporation

DS005255

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