LP3906 datasheet(22/47 Pages) TI1

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EN_T

Vout Buck1

Vout Buck2

Vout LDO1

Vout LDO2

EN_T

Ext Enable

Pins

Regulator ON

LP3906

SNVS456M – AUGUST 2006 – REVISED MAY 2013

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NOTE

LP3906 The default Power on delays can be reprogrammed at final test or by using I2C

registers to 1, 1.5, 2, 3, 6, or 11 ms.

The regulators can also be programmed through I2C to turn on and off. By default, the I2C enables for the

regulators are ON.

The regulators are on following the pattern below:

Regulators on = (I2C enable) AND (External pin enable OR EN_T high).

NOTE

The EN_T power-up sequencing may also be employed immediately after VIN is applied to

the device. However, VIN must be stable for approximately 8ms minimum before EN_T be

asserted high to ensure internal bias, reference, and the Flexible POR timing are

stabilized. This initial EN_T delay is necessary only upon first time device power-on for

power sequencing function to operate properly.

LP3906 Default Power-Up Sequence

Table 4. Power-On Timing Specification

Symbol

Description

Min

Typ

Max

Units

Programmable Delay from EN_T assertion to VCC_Buck1 On

1.5

Programmable Delay from EN_T assertion to VCC_Buck2 On

Programmable Delay from EN_T assertion to VCC_LDO1 On

Programmable Delay from EN_T assertion to VCC_LDO2 On

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