pp-esr

2

4 x f x C

LP3906

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SNVS456M – AUGUST 2006 – REVISED MAY 2013

Output Capacitor Selection for SW1, SW2

A 10 µF, 6.3V ceramic capacitor should be used on the output of the sw1 and sw2 magnetic dc/dc converters.

The output capacitor needs to be mounted as close as possible to the output of the device. A large value may be

used for improved input voltage filtering. The recommended capacitor types are X7R or X5R. Y5V type

capacitors should not be used. DC bias characteristics of ceramic capacitors must be considered when selecting

case sizes like 0805 and 0603. DC bias characteristics vary from manufacturer to manufacturer and DC bias

curves should be requested from them and analyzed as part of the capacitor selection process.

The output filter capacitor of the magnetic dc/dc converter smoothes out current flow from the inductor to the

load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple.

These capacitors must be selected with sufficient capacitance and sufficiently low ESD to perform these

functions.

The output voltage ripple is caused by the charging and discharging of the output capacitor and also due to its

ESR and can be calculated as follows:

(8)

Voltage peak-to-peak ripple due to ESR can be expressed as follows:

(9)

peak-to-peak ripple:

(10)

Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series

Capacitor

Min Value

Unit

Description

Recommended Type

0.47

µF

LDO1 output capacitor

Ceramic, 6.3V, X5R

0.47

µF

LDO2 output capacitor

Ceramic, 6.3V, X5R

10.0

µF

SW1 output capacitor

Ceramic, 6.3V, X5R

10.0

µF

SW2 output capacitor

Ceramic, 6.3V, X5R

∼1.8kΩ) are determined by the capacitance of

the bus. Too large of a resistor combined with a given bus capacitance will result in a rise time that would violate

the max. rise time specification. A too small resistor will result in a contention with the pull-down transistor on

either slave(s) or master.

default output values of the LDO and Buck converters.

Factory Programmable Options

The following options are EPROM programmed during final test of the LP3906. The system designer that needs

specific options is advised to contact the local Texas Instruments sales office.

Factory programmable options

Current value

Enable delay for power on

code 010 (see BUCK VOLTAGE CHANGE CONTROL REGISTER 1 (VCCR) – 0X20)

SW1 ramp speed

8 mV/µs

SW2 ramp speed

8 mV/µs

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