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CY2210PVC-4 数据表(PDF) 2 Page - Cypress Semiconductor

部件名 CY2210PVC-4
功能描述  133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP, USB, and DRCG Support
PDF  10 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

CY2210PVC-4 数据表(HTML) 2 Page - Cypress Semiconductor

  CY2210PVC-4 Datasheet HTML 1Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 2Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 3Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 4Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 5Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 6Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 7Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 8Page - Cypress Semiconductor CY2210PVC-4 Datasheet HTML 9Page - Cypress Semiconductor Next Button
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CY2210
Document #: 38-07204 Rev. *A
Page 2 of 10
Pin Summary
Name
Pins
Description
VSSREF
1
3.3V Reference ground
VDDREF
4
3.3V Reference voltage supply
VSSPCI
7, 13, 19
3.3V PCI ground
VDDPCI
10, 16
3.3V PCI voltage supply
VSSAGP
20, 24
3.3V AGP ground
VDDAGP
23, 27
3.3V AGP voltage supply
VSSUSB
29
3.3V USB ground
VDDUSB
31
3.3V USB voltage supply
VSSCPU
40, 44
2.5V CPU ground
VDDCPU
43, 47
2.5V CPU voltage supply
VSSCPU/2
48
2.5V CPU/2 ground
VDDCPU/2
51
2.5V CPU/2 voltage supply
VSSAPIC
52
2.5V APIC ground
VDDAPIC
56
2.5V APIC voltage supply
AVSS
38
Analog ground to PLL and Core
AVDD
39
Analog voltage supply to PLL and Core
XTALIN[1]
5
Reference crystal input
XTALOUT[1]
6
Reference crystal feedback
CPUCLK [0–3]
41, 42, 45, 46
CPU clock outputs
PCICLK [1–7]
9, 11, 12, 14, 15, 17, 18
PCI clock outputs, synchronously running at 33.33 MHz
PCICLK_F
8
Free running PCI clock
CPUCLK/2
49, 50
CPU/2 clock outputs, drive memory clock generator
AGPCLK [0–3]
21, 22, 25, 26
AGP clock outputs, running at 66.66 MHz
APICCLK [0–2]
53, 54, 55
APIC clock outputs, running at 16.67 MHz
REFCLK [0–1]
2, 3
Reference clock outputs, 14.318 MHz
USBCLK
30
48-MHz USB clock output
CPU_STOP
36
Active LOW input, disables CPU and AGP clocks when asserted
PCI_STOP
37
Active LOW input, disables PCI clocks when asserted
PWR_DWN
35
Active LOW input, powers down part when asserted
SPREAD
34
Active LOW input, enables spread spectrum when asserted
SEL1
33
CPU frequency select input (See Function Table)
SEL0
32
CPU frequency select input (See Function Table)
SEL133
28
CPU frequency select input (See Function Table)
Note:
1.
For best accuracy, use a parallel-resonant crystal, CLOAD = 18 pF. For crystals with different CLOAD, please refer to the application note, “Crystal Oscillator
Topics.”



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