MCP2003/4/3A/4A

DS20002230F-page 14

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Bus Interface

High-Level Input Voltage

—

—

V

Recessive state

Low-Level Input Voltage

—

V

Dominant state

Input Hysteresis

—

—

Low-Level Output Current

40

—

200

mA

High-Level Output Current

—

20

µA

Pull-up Current on Input

—

180

µA

~30 k

 internal pull-up

Short Circuit Current Limit

50

—

200

mA

(Note 1)

High-Level Output Voltage

V

Driver Dominant Voltage

——

1.2

V



Driver Dominant Voltage

——

2.0

V



Driver Dominant Voltage

0.6

—

—

V



Driver Dominant Voltage

0.8

—

—

V



Input Leakage Current

(at the receiver during

dominant bus level)

-1

-0.4

—

mA

Driver off,

Input Leakage Current

(at the receiver during

recessive bus level)

—

12

20

µA

Driver off,

Leakage Current

(disconnected from ground)

-10

1.0

+10

µA

Leakage Current

——

10

µA

(Note 2)

Receiver Center Voltage

Slave Termination

20

30

47

k



Capacitance of Slave Node

——

50

pF

2.3

DC Specifications (Continued)

DC Specifications

Electrical Characteristics:

Unless otherwise indicated, all limits are specified for

Parameter

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

2:

Node has to sustain the current that can flow under this condition; bus must be operational under this

condition.