TNETE2004

MDIO-MANAGED QuadPHY

FOUR 10BASE-T PHYSICAL-LAYER INTERFACES

SPWS023D – OCTOBER 1996 – REVISED OCTOBER 1997

12

POST OFFICE BOX 655303

collision/signal-quality error detection

When not in full-duplex mode, collisions are detected by sensing simultaneous activity on both the transmit and

the receive pins. A collision detection is signified by COL on the respective PHY being driven high for the

duration of the condition and for a specified time afterwards.

The TNETE2004 device also provides a signal-quality error (SQE) function. This function can be enabled or

disabled only for the whole device and not for individual PHYs. When SQE is enabled, following transmission,

a simulated collision is presented to a PHY. PHY tests as much of the collision-detect circuitry as possible

without affecting the attached twisted-pair channels. Each PHY asserts its COL output signal high for a defined

time interval relative to the last positive data edge of its transmit data input. SQE is invoked by driving SQE high

or by using the TNETE2004 registers.

jabber detection

Each PHY monitors the length of the packet being transmitted. If a single packet exceeds 20 ms, a jabber

condition is detected. The output is disabled, and CRS is driven low. The TNETE2004 device asserts COL, while

attempts are made to transmit data, and signals link-fail for the duration of the attempts. The device also asserts

COL (for half-duplex mode only) when it has detected that the transmitter has entered jabber mode. To clear

the jabber function, transmission must cease for a minimum of 500 ms.

auto-negotiation

Each PHY on the device is capable of auto-negotiation as defined in IEEE Std 802.3. When enabled, this feature

allows a PHY to negotiate with another PHY on the link to establish their highest common protocol. Until a PHY

has completed its negotiation, it cannot assert LINK.

The only two protocols possible for the TNETE2004 are half- or full-duplex 10BASE-T. When auto-negotiation

indicates that full-duplex operation is possible, a weak pullup resistor is applied to DUPLEX on the device,

allowing full-duplex operation, unless the pin is pulled low externally.

link-partner register

This register contains the information for the link partner. Refer to Table 6 for the link partner’s ability-register

bit functions.

expansion register

Refer to Table 7 for the bit definition on the expansion register.

next_page transmit

After exchanging the base page, which contains the information to make connection automatically, if both ends

of the link indicate support for the next_page function, additional data can be exchanged. This allows extensions

to the standard and proprietary extensions to exist without affecting interoperability. Refer to Figure 11 for the

next_page transmit register.

management-data interface

The TNETE2004 incorporates a management-data interface to allow register-based management operations

for each PHY module. Operation of the TNETE2004 is possible without use of the management-data interface,

since all the signals necessary for complete functionality are accessible by way of the device pins; however,

some additional features are accessible only through the management-data interface.

interrupt enable cycle

The TNETE2004 can generate interrupts via the MDIO interface after the quiescent cycle. The quiescent cycle

is the cycle following the data transfer in which neither the external MAC nor the PHYs drive MDIO. The

TNETE2004 indicates to the host that an interrupt is pending by driving MDIO low. This happens one clock cycle

after the quiescent cycle, while MDCLK is high. When MDCLK goes low, TNETE2004 stops driving MDIO so

the host can determine what caused the interrupt.