PCM3010

SLES055 – NOVEMBER 2002

27

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synchronization with digital audio system (continued)

Figure 50 illustrates the DAC analog output and ADC digital output for loss of synchronization.

During undefined data, some noise may be generated in the audio signal. Also, the transition from normal to

undefined data and from undefined or zero data to normal creates a data discontinuity on the analog and digital

outputs, which may generate some noise in the audio signal.

Within 6/fS

tDACDLY2

32/fS

NORMAL DATA

UNDEFINED

DATA

NORMAL DATA

SYNCHRONOUS

ASYNCHRONOUS

SYNCHRONOUS

DAC VOUT

State of Synchronization

NORMAL DATA

ZERO DATA

UNDEFINED

DATA

NORMAL DATA

ADC DOUT

VCOM (0.5 VCC2)

tADCDLY2

32/fS

Figure 50. DAC Output and ADC Output for Lost of Synchronization

de-emphasis control

DEMP1, DEMP0: De-emphasis control pins select the de-emphasis mode of the DACs as shown below.

DEMP1

DEMP0

DESCRIPTION

LOW

LOW

De-emphasis 44.1 kHz ON

LOW

HIGH

De-emphasis OFF

HIGH

LOW

De-emphasis 48 kHz ON

HIGH

HIGH

De-emphasis 32 kHz ON

test control

TEST: The TEST pin is used for device testing; it must be connected to DGND for normal operation.